Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.

Abstract: Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and between the source region and drain region. A solid electrolyte layer is between the first insulating layer and second insulating layer. The solid electrolyte layer has a capacitance that is controllable between at least two states. A first electrode is electrically coupled to a first side of the solid electrolyte layer and is electrically coupled to a voltage source. A second electrode is electrically coupled to a second side of the solid electrolyte layer and is electrically coupled to the voltage source. Multi-bit memory units are also disclosed.

Abstract: Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.

Abstract: A magnetic tunnel junction memory apparatus and self-reference read and write assist schemes are described. One method of self-reference reading a magnetic tunnel junction memory unit includes applying a first read current through a magnetic tunnel junction data cell to form a first bit line read voltage, then applying a first magnetic field through the magnetic tunnel junction data cell forming a magnetic field modified magnetic tunnel junction data cell, and then applying a second read current thorough the magnetic field modified magnetic tunnel junction data cell to form a second bit line read voltage. The first read current being less than the second read current. Then comparing the first bit line read voltage with the second bit line read voltage to determine whether the magnetic tunnel junction data cell was in a high resistance state or a low resistance state. Methods of applying a magnetic field to the MTJ and then writing the desired resistance state are also disclosed.

Abstract: In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer.

Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.

Abstract: An apparatus and associated method for a magnetic element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a free layer that has a first areal extent that is sensitive to a magnetic field and a synthetic antiferromagnetic (SAF) layer adjacent to the free layer and has a second areal extent that is greater than the first areal extent.

Abstract: A magnetic tunnel junction having a compensation element is disclosed. The magnetic tunnel junction includes a synthetic antiferromagnetic reference element, and a synthetic antiferromagnetic compensation element having an opposite magnetization moment to a magnetization moment of the synthetic antiferromagnetic reference element. A free magnetic layer is between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer includes Co100-X-YFeXBY wherein X is a value being greater than 30 and Y is a value being greater than 15.

Abstract: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.

Abstract: A disclosed device having a principle axis and including a magnetoresistive stack, the magnetoresistive stack having first and second opposing surfaces, the magnetoresistive stack including a free layer, a spacer layer, and a reference layer, wherein the spacer layer is positioned between the first and reference layer, the free layer includes magnetic material having a free magnetic orientation in a first plane; the spacer layer includes a nonmagnetic material; and the reference layer includes a magnetic material having a pinned magnetic orientation in a second plane, wherein the second plane is perpendicular to the first plane and parallel to the principle axis of the device; an insulating layer at least a portion of the outer surface of the magnetoresistive stack; a shielding layer surrounding at least a portion of the insulating layer; and a conducting layer, wherein the conducting layer provides electrical connection between the magnetoresistive stack and the shielding layer.

Abstract: Method and apparatus for using a uni-directional write current to store different logic states in a non-volatile memory cell, such as a modified STRAM cell. In some embodiments, the memory cell has an unpinned ferromagnetic reference layer adjacent a cladded conductor, a ferromagnetic storage layer and a tunneling barrier between the reference layer and the storage layer. Passage of a current along the cladded conductor induces a selected magnetic orientation in the reference layer, which is transferred through the tunneling barrier for storage by the storage layer. Further, the orientation of the applying step is provided by a cladding layer adjacent a conductor along which a current is passed and the current induces a magnetic field in the cladding layer of the selected magnetic orientation.

Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.

Abstract: In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer.

Abstract: A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching.

Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.

Abstract: A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure.

Abstract: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.

Abstract: Non-volatile magnetic random access memory (MRAM) devices that include magnetic flip-flop structures that include a magnetization controlling structure; a first tunnel barrier structure; and a magnetization controllable structure that includes a first polarizing layer; and a first stabilizing layer, wherein the first tunnel barrier structure is between the magnetization controllable structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the first tunnel barrier structure, wherein the magnetic flip-flop device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization so that the device reaches one of the two stable overall magnetic configurations, wherein

Abstract: Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current.

Abstract: Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current.