Patents by Inventor Dimitris Pantelakis
Dimitris Pantelakis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9406346Abstract: An apparatus includes a first semiconductor device including a NAND flash memory core. The apparatus also includes a second semiconductor device including periphery circuitry associated with the NAND flash memory core.Type: GrantFiled: September 28, 2011Date of Patent: August 2, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9406385Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes receiving, at the controller, first data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, first dummy data, and second dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The first dummy data and the second dummy data prevent a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: GrantFiled: September 17, 2013Date of Patent: August 2, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Manuel Antonio D'Abreu, Dimitris Pantelakis
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Patent number: 9361220Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes receiving, at the controller, first data and second data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, the second data, and dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The dummy data prevents a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: GrantFiled: September 17, 2013Date of Patent: June 7, 2016Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis
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Patent number: 9245631Abstract: A storage device includes a controller and a non-volatile memory that includes a three-dimensional (3D) memory. A method performed in the data storage device includes receiving, at the controller, first data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, first dummy data, and second dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The first dummy data and the second dummy data prevent a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: GrantFiled: May 28, 2014Date of Patent: January 26, 2016Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis
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Patent number: 9218852Abstract: An apparatus includes a first semiconductor device including a memory core. The apparatus also includes a second semiconductor device including periphery circuitry associated with the memory core. The second semiconductor device includes a second serializer/deserializer communication interface coupled to a first serializer/deserializer communication interface of a memory controller.Type: GrantFiled: September 28, 2011Date of Patent: December 22, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9177609Abstract: An apparatus includes a first memory die including a first memory core, a second memory die including a second memory core, and a periphery die coupled to the first memory die and to the second memory die. The periphery die includes periphery circuitry corresponding to the first memory core and periphery circuitry corresponding to the second memory core. The periphery die is responsive to a memory controller and configured to initiate a first memory operation at the first memory core and a second memory operation at the second memory core.Type: GrantFiled: September 28, 2011Date of Patent: November 3, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9177610Abstract: An apparatus includes a semiconductor device including a three-dimensional (3D) memory. The 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The 3D memory includes circuitry associated with operation of the multiple memory cells and includes a differential signaling interface.Type: GrantFiled: April 7, 2014Date of Patent: November 3, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9177612Abstract: An apparatus includes a semiconductor device that includes a multi-ported three-dimensional (3D) memory. The multi-ported 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The multi-ported 3D memory includes circuitry associated with operation of the multiple memory cells.Type: GrantFiled: April 7, 2014Date of Patent: November 3, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9177611Abstract: An apparatus includes a first semiconductor device including a three-dimensional (3D) memory. The 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The 3D memory further includes circuitry associated with operation of the multiple memory cells. The apparatus includes a second semiconductor device coupled to the first semiconductor device. The second semiconductor device includes a charge pump, and the 3D memory does not include a charge pump.Type: GrantFiled: April 7, 2014Date of Patent: November 3, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9153331Abstract: A data storage device includes a memory and a controller and may perform a method that includes updating, in a controller of the data storage device, a value of a particular write/erase (W/E) counter of a set of counters in response to an erase operation to a particular region of the non-volatile memory that is tracked by the particular W/E counter and that includes a storage element that is tracked by a particular cell erase counter of the set of counters. The method includes, in response to the value of the particular W/E counter indicating that a count of erase operations to the particular region satisfies a first threshold, initiating a remedial action to the particular region of the non-volatile memory at least partially based on the value of the particular cell erase counter.Type: GrantFiled: March 13, 2013Date of Patent: October 6, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis, Stephen Skala
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Patent number: 9142261Abstract: An apparatus includes a semiconductor device that includes a three-dimensional (3D) memory. The 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The 3D memory includes circuitry associated with operation of the multiple memory cells and includes a serializer/deserializer interface.Type: GrantFiled: April 7, 2014Date of Patent: September 22, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Stephen Skala, Dimitris Pantelakis, Radhakrishnan Nair, Deepak Pancholi
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Patent number: 9129689Abstract: A data storage device includes a memory and a controller and may perform a method that includes comparing, in the controller, a count of erase pulses to an erase pulse threshold. The count of erase pulses corresponds to a particular region of the non-volatile memory. The method includes, in response to the count of erase pulse satisfying the erase pulse threshold, initiating a remedial action with respect to the particular region of the non-volatile memory.Type: GrantFiled: March 13, 2013Date of Patent: September 8, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis, Stephen Skala
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Patent number: 9117533Abstract: A data storage device includes a memory and a controller and may perform a method that includes updating, in the controller, a value of a particular counter of a set of counters in response to an erase operation to a particular region of the non-volatile memory that is tracked by the particular counter. The method includes, in response to the value of the particular counter indicating that a count of erase operations to the particular region satisfies a first threshold, initiating a remedial action to the particular region of the non-volatile memory.Type: GrantFiled: March 13, 2013Date of Patent: August 25, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis, Stephen Skala
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Patent number: 9110788Abstract: A storage device includes a controller and a non-volatile memory that includes a three-dimensional (3D) memory. A method performed in the data storage device includes receiving, at the controller, first data and second data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, the second data, and dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The dummy data prevents a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: GrantFiled: May 28, 2014Date of Patent: August 18, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Manuel Antonio D'Abreu, Dimitris Pantelakis
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Publication number: 20150081949Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes receiving, at the controller, first data and second data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, the second data, and dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The dummy data prevents a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS
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Publication number: 20150078078Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes receiving, at the controller, first data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, first dummy data, and second dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The first dummy data and the second dummy data prevent a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS
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Publication number: 20150081952Abstract: A storage device includes a controller and a non-volatile memory that includes a three-dimensional (3D) memory. A method performed in the data storage device includes receiving, at the controller, first data and second data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, the second data, and dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The dummy data prevents a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: ApplicationFiled: May 28, 2014Publication date: March 19, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS
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Publication number: 20150078079Abstract: A storage device includes a controller and a non-volatile memory that includes a three-dimensional (3D) memory. A method performed in the data storage device includes receiving, at the controller, first data to be stored at the non-volatile memory. The method further includes sending, from the controller, the first data, first dummy data, and second dummy data to the non-volatile memory to be stored at respective logical pages of a single physical page in the non-volatile memory. The single physical page includes multiple storage elements that are programmable into multiple voltage states according to a mapping of bits to states. The first dummy data and the second dummy data prevent a storage element of the single physical page from being programmed to a particular voltage state of the multiple voltage states.Type: ApplicationFiled: May 28, 2014Publication date: March 19, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS
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Publication number: 20140269068Abstract: A data storage device includes a memory and a controller and may perform a method that includes comparing, in the controller, a count of erase pulses to an erase pulse threshold. The count of erase pulses corresponds to a particular region of the non-volatile memory. The method includes, in response to the count of erase pulse satisfying the erase pulse threshold, initiating a remedial action with respect to the particular region of the non-volatile memory.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS, STEPHEN SKALA
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Publication number: 20140269069Abstract: A data storage device includes a memory and a controller and may perform a method that includes updating, in a controller of the data storage device, a value of a particular write/erase (W/E) counter of a set of counters in response to an erase operation to a particular region of the non-volatile memory that is tracked by the particular W/E counter and that includes a storage element that is tracked by a particular cell erase counter of the set of counters. The method includes, in response to the value of the particular W/E counter indicating that a count of erase operations to the particular region satisfies a first threshold, initiating a remedial action to the particular region of the non-volatile memory at least partially based on the value of the particular cell erase counter.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: SANDISK TECHNOLOGIES INC.Inventors: MANUEL ANTONIO D'ABREU, DIMITRIS PANTELAKIS, STEPHEN SKALA