Patents by Inventor Dinesh Kumar

Dinesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220171558
    Abstract: Non-volatile memory (NVM) dies of a data storage device, wherein on-chip latches of the dies are made available to a host device for use as volatile memory. In some examples, a data storage controller dynamically determines when the latches of a particular NVM die of an NVM array are available for use as volatile memory and exports those particular latches to the host device for use as random access memory (RAM). In other examples, the data storage controller dynamically determines when particular dies of the NVM array of dies are available and exports all latches of those dies to the host device for use as RAM. The data storage controller may rotate NVM die usage so that, over time, different dies are used for latch-based volatile memory while other dies are used for NVM storage. Usage profiles are described that allow the host device to select particular latch usage configurations.
    Type: Application
    Filed: February 24, 2021
    Publication date: June 2, 2022
    Inventors: Amit Sharma, Dinesh Kumar Agarwal
  • Patent number: 11347420
    Abstract: Aspects of a multi-protocol storage device including a memory and a controller are provided which allow for endurance and other storage requirements of a host to be maintained for different logical regions of memory without disruption due to protocol switching. The memory includes blocks that are each associated with a storage attribute such as high endurance, performance, or protection. While operating in a first mode such as NVMe, the controller receives a mapping of storage attributes to different logical regions and stores the mapping in memory. The controller also associates blocks to logical addresses based on the mapping. When the controller switches to a second mode such as SD in response to a host command, the controller reads the mapping from memory and similarly associates blocks to logical addresses based on the mapping in the second mode. Storage attributes thus remain applicable across modes when mapping and storing data.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: May 31, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ramanathan Muthiah, Dinesh Kumar Agarwal, Hitesh Golechchha
  • Patent number: 11331324
    Abstract: The present invention discloses an extended release oral liquid pharmaceutical composition comprising eslicarbazepine or its pharmaceutically acceptable esters, salts, solvates, polymorphs, enantiomers or mixtures thereof in a pharmaceutically acceptable carrier. The extended release liquid compositions are in the form of ready-to-use liquid compositions or reconstituted liquid compositions. It also relates to processes for the preparation of said extended release liquid compositions. The prior art discloses immediate release oral liquid dosage form. The prepared novel test formulations exhibited desired pharmaceutical technical attributes.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: May 17, 2022
    Inventors: Dinesh Kumar, Saurabh Srivastava, Indranil Nandi, Rakesh K. Singh, Amit Jha, Kamal S. Mehta
  • Patent number: 11318145
    Abstract: The present invention relates to oral ready to use liquid pharmaceutical compositions of eslicarbazepine. It also relates to the processes for the preparation of said liquid compositions. The present invention provides liquid compositions of eslicarbazepine with desired technical attributes such as release profile, viscosity, pH, stability, and acceptable organoleptic properties. The prepared compositions are useful in patients having difficulties in swallowing tablets and provide the physician with providing a more convenient and less cumbersome posology.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: May 3, 2022
    Inventors: Indranil Nandi, Tusharmouli Mukherjee, Dinesh Kumar, Rakesh K. Singh, Saurabh Srivastava
  • Patent number: 11314445
    Abstract: Aspects of a storage device are provided which allow for identification of control page patterns from previous read commands and prediction of control pages to load in advance for subsequent read commands. The storage device includes a memory configured to store data and a plurality of control pages. Each of the control pages includes a plurality of logical addresses associated with the data. A controller is configured to receive from a host device a plurality of read commands associated with a sequence of the control pages. The controller is further configured to identify and store a control page pattern based on the sequence of control pages and to predict one or more of the control pages from one or more of the other control pages in the sequence in a subsequent plurality of read commands.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: April 26, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Dinesh Kumar Agarwal, Hitesh Golechchha, Sourabh Sankule
  • Patent number: 11315228
    Abstract: A system and method of identifying potential areas for mineral extraction is disclosed. The proposed systems and methods describe an autonomous mineral discovery platform that leverages robotics, X-Ray Florescence (XRF) technology, image analytics, smart devices, and IoT enabled devices to perform comprehensive field surveying and exploratory sampling. For example, by implementation of remote navigation and control, as well as field data capture and real-time data transmission capabilities, this platform can be configured to automatically identify rock types and their surface features and perform elemental composition analysis of surface while on-site and remote from the operator site.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: April 26, 2022
    Assignee: Accenture Global Solutions Limited
    Inventors: Vivek Vaidyanathan, Dinesh Kumar Vemula, Abhirama Rao, Bhudeep Hathi, Narendra Kumar, Swati Acharjee
  • Patent number: 11316746
    Abstract: Identifications of program processes executing on an information technology environment are received. The identified program processes are clustered into a plurality of different groups. Identifications of interactions between at least a portion of the program processes are received. The identified interactions are analyzed to determine one or more interaction metrics between different group pairs in the plurality of different groups. A graph representation that includes at least a portion of the plurality of different groups as graph nodes in the graph representation is generated. The graph representation includes one or more graph edges determined to be included based on the one or more interaction metrics.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: April 26, 2022
    Assignee: ServiceNow, Inc.
    Inventors: Robert Bitterfeld, Dinesh Kumar Kishorkumar Surapaneni, Asaf Garty, Baskar Jayaraman
  • Publication number: 20220121367
    Abstract: A resource tracking storage system can track and associate resource usage within storage devices to requesting virtual hosts. Controllers may be configured to receive commands for storage device usage sent from the requesting virtual hosts. Each command for storage device usage may result in a need for future maintenance work to be done within the storage device. Additionally, performance policies, which may be one or more set of rules, thresholds, and/or specifications that indicate a minimum (or maximum) level of performance by the storage device can be regulated by tracking and determining which hosts are degrading the performance of the storage device. With this solution, one or more performance policies can also be enforced by making sure one host is not negatively impacted from the negative storage device usage of another, errant host, even prior to the need for maintenance.
    Type: Application
    Filed: February 22, 2021
    Publication date: April 21, 2022
    Inventor: Dinesh Kumar Agarwal
  • Publication number: 20220113905
    Abstract: Aspects of a storage device including a memory and a controller are provided which re-prioritize commands based on zone properties. The controller receives from a host commands associated with a plurality of zones, allocates the memory into a plurality of zone resources based on zone properties indicated by the host for the zones, and identifies a utilization state of the memory for one of the zones. The controller changes a priority order of the commands based on the zone properties and the utilization state for the one of the zones. The controller then executes the commands in the memory or zone resources according to the priority order. As a result, execution of commands may be balanced between zones and lower latencies may be achieved overall for each zone. Improved performance or throughput of the storage device in handling zone commands may therefore result.
    Type: Application
    Filed: February 19, 2021
    Publication date: April 14, 2022
    Inventors: Dinesh Kumar Agarwal, Amit Sharma
  • Publication number: 20220113869
    Abstract: A storage system and method for time-duration-based efficient block management and memory access are provided. In one embodiment, a controller of the storage system is configured to receive time stamps from a host for each of a plurality of blocks in the memory; determine a time duration for programming each of the plurality of blocks based on the time stamps; and differentiate the plurality of blocks based on the time durations. Other embodiments are provided.
    Type: Application
    Filed: February 16, 2021
    Publication date: April 14, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventor: Dinesh Kumar Agarwal
  • Publication number: 20220113361
    Abstract: In accordance with various embodiments, a magnetic resonance imaging system is provided. In accordance with various embodiments, the system includes a housing having a front surface, a permanent magnet for providing a static magnetic field, a radio N frequency transmit coil, and at least one gradient coil set. In accordance with various embodiments, the radio frequency transmit coil and the at least one gradient coil set are positioned proximate to the front surface. In accordance with various embodiments, the radio frequency transmit coil and the at least one gradient coil set are configured to generate an electromagnetic field in a region of interest. In accordance with various embodiments, the permanent magnet has an aperture through center of the permanent magnet. In accordance with various embodiments, the region of interest resides outside the front surface.
    Type: Application
    Filed: February 24, 2020
    Publication date: April 14, 2022
    Applicant: PROMAXO, INC.
    Inventors: Aleksandar NACEV, Jose ALGARIN, Pulkit MALIK, Hongli DONG, Muller GOMES, Sabareish PANDIAN, Dinesh KUMAR, John NOLTE, Ram NARAYANAN
  • Patent number: 11301608
    Abstract: Methods, machine readable media and systems for simulating the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. In one embodiment, a method can include the following operations: performing a first dynamic voltage drop (DVD) simulation on a plurality of locations, distributed across an integrated circuit (IC), based on a physical model that specifies physical layout of components on the IC, the IC storing sensitive data in locations of the layout; performing an IC level side channel correlation analysis between each of the locations and the sensitive data based on the results of the first DVD simulation; and selecting, based upon the IC level side channel correlation analysis, a subset of the locations for further simulations to simulate leakage of the sensitive data. Other methods, media and systems are disclosed.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: April 12, 2022
    Assignee: ANSYS, INC.
    Inventors: Lang Lin, Dinesh Kumar Selvakumaran, Norman Chang, Calvin Chow, Deqi Zhu
  • Publication number: 20220109747
    Abstract: A multi-logical port data traffic stream preservation system includes a networking device coupled to a computing device via its physical port, a first networking fabric via a first uplink, and a second networking fabric via a second uplink. The networking device receives communications from the computing device that identify first and second logical ports provided using the physical port on the computing device, a first data traffic type associated with the first networking fabric and transmitted on the first logical port, and a second data traffic type associated with the second networking fabric and transmitted on the second logical port. If the first uplink becomes unavailable, the networking device transmits a communication to the computing device that causes the computing device to stop transmitting the first data traffic type via the first logical port while continuing to transmit the second data traffic type via the second logical port.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 7, 2022
    Inventors: Dinesh Kumar Mani, Amitabh Jawahar Abraham, Shradha Ambani
  • Patent number: 11294579
    Abstract: Aspects of a multi-protocol storage device including a controller are provided which handle mode switches after a shutdown resulting in a large amount of unfinished work by phasing the work during and after initialization. The controller operates in a first mode such as an SD mode and a second mode such as a NVMe mode. In the event of a shutdown in the second mode resulting in unfinished work, the controller initializes in the first mode. During initialization, the controller determines whether a completion time for the unfinished work exceeds an initialization time in the first mode. When the completion time exceeds the initialization time, the controller performs a first portion of the work during initialization and postpones performance of at least a second portion of the unfinished work until after initialization. As a result, initialization timeouts in the first mode due to the unfinished work may be avoided.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: April 5, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ramanathan Muthiah, Hitesh Golechchha, Dinesh Kumar Agarwal
  • Patent number: 11288380
    Abstract: A blockchain architecture allows blocks to store both public and private data. The public data may be accessible to any node in the blockchain network, while the private data may be accessible only to nodes specified in an access list, which may be provided when a record is added to the blockchain. When a new record is received, any private fields in the record may be identified and encrypted by a receiving node. The key may then be encrypted and sent with the protected record to other nodes in the access list. These nodes can access the encryption key, decrypt the private fields, and provide a consensus decision to a receiving node. After consensus, the protected record may be added to the blockchain, where the public fields may be freely accessed by any node, and the private fields remain accessible only to nodes in the access list.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: March 29, 2022
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Dinesh Kumar, David Joseph Haimes, Todd Jeffery Little
  • Patent number: 11281405
    Abstract: Aspects of a storage device including a plurality of dies and a controller are provided which allow for asymmetric die operation handling so that controller overheads associated with common resource intensive operations may be incurred in the background without delaying subsequent die operations. When the controller receives a command to perform an MLC operation such as programming a number of dies, the controller refrains from performing the MLC operation in one or more of the dies for a period of time while simultaneously performing the MLC operation in a remainder of the dies. Instead, the controller performs another operation, such as an SLC operation, another MLC operation, or a transfer operation, that involves a common resource in these dies during the period of time. Controller overheads associated with these other operations thus are incurred without creating bottlenecks when the number of dies is large, thereby improving storage device performance.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: March 22, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Amit Sharma, Abhinandan Venugopal, Dinesh Kumar Agarwal
  • Publication number: 20220083221
    Abstract: Data blocks may be optimized and managed in a mixed mode that utilizes a single-level cell (SLC) mode in combination with higher-density memory modes to promote full block utilization and to increase overall cycles of the data blocks. A data block cycling process in the mixed mode can place a data block in a higher-density memory mode that includes a multi-level cell (MLC) mode, a triple-level cell (TLC) mode, or a quad-level cell (QLC) mode, if the SLC cycle count of the data block is relatively higher as compared to other data blocks. Similarly, in the mixed mode, a data block may be placed in the SLC mode to store parity data or intermediate data if the corresponding TLC cycle count is relatively higher than other data blocks. Data clocks cycles may also be evenly distributed in the mixed mode, thereby balancing the mixed mode usage across all data blocks.
    Type: Application
    Filed: February 24, 2021
    Publication date: March 17, 2022
    Inventors: Dinesh Kumar Agarwal, Sourabh Sankule
  • Publication number: 20220086225
    Abstract: Storage devices and systems are capable of dynamically managing QoS requirements associated with host applications via a management interface. The management interface may the enable storage devices to: (i) decide which data needs to be transferred back to the hosts, (ii) choose to skip portions of the data transferred back to the hosts to improve throughput and maintain low cost, and (iii) operate contention resolutions with host applications. Furthermore, storage devices and systems may achieve a virtual throughput that may be greater than its actual physical throughput. The management interface may also be operated at an application level, which advantageously allows the devices and systems the capabilities of managing contention resolutions of host applications, and managing (changing, observing, fetching, etc.) one or more QoS requirements for each host application.
    Type: Application
    Filed: February 24, 2021
    Publication date: March 17, 2022
    Inventors: Dinesh Kumar Agarwal, Amit Sharma
  • Publication number: 20220075545
    Abstract: Storage devices are capable of identifying zones for sharing parity blocks across zones. Active zones may be segregated across multiple active zones having similar zone properties, and grouped so that parity buffers can be shared. By identifying zones for optimal parity sharing, storage devices and systems can: (i) maintain independent parity for all zones during initial zone writes (i.e. during an erased state when data is written directly to pages and not to the zones), (ii) track zone write pointers and frequency of writes in the zones, (iii) segregate zones with higher correlation and group them together, (iv) utilize these groupings placed across various channels so that zones with high correlations, comprising of the zones that are written together and at the same rate, share the parity buffers, and (v) load and XOR individual parity buffers for optimal parity sharing across all zones.
    Type: Application
    Filed: February 26, 2021
    Publication date: March 10, 2022
    Inventor: Dinesh Kumar Agarwal
  • Publication number: 20220076753
    Abstract: A storage system and method for a hybrid quad-level cell (QLC) write scheme for reduced random access memory (RAM) footprint and better performance are provided. In one example, a storage system includes a volatile memory and a non-volatile memory. A Foggy program operation is performed in a QLC memory in the non-volatile memory by writing two pages of data into the QLC memory. Then, a Fine program operation is performed in the QLC memory by reading the two pages of data written to the QLC memory in the Foggy program operation, reading two other pages of data from the volatile memory, and writing the two pages of data read from the QLC memory and the two other pages of data read from the volatile memory in the QLC memory.
    Type: Application
    Filed: February 22, 2021
    Publication date: March 10, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Sourabh Sankule, Dinesh Kumar Agarwal, Chetan Agrawal