Patents by Inventor Ding-I Liu

Ding-I Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048185
    Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: June 2, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Chiang, Kuang-Cheng Wu, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu
  • Patent number: 8946095
    Abstract: A method of forming an interlayer dielectric film above a metal gate of a metal oxide semiconductor device comprises forming a metal gate above a semiconductor substrate; and forming the interlayer dielectric film above the metal gate by reacting a silicon-containing compound as precursor and a reactant for oxidizing the silicon-containing compound. The silicon-containing compound has the formula: Six(A)y(B)z(C)m(D)n??(I) wherein x is in the range of from 1 to 9; y+z+m+n is in the range of from 4 to 20; and A, B, C, and D independently represent a functional group connecting with a silicon atom. The functional group is selected from a group consisting of alkyl, alkenyl, alkynyl, aryl, alkylaryl, alkoxyl, alkylcarbonyl, carboxyl, alkylcarbonyloxy, amide, amino, alkylcarbonylamino, —NO2, and —CN.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: February 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li Chen, Jyh-Nan Lin, Chin-Feng Sun, Po-Hsiung Leu, Ding-I Liu
  • Publication number: 20150001728
    Abstract: A method of forming a semiconductor device, the method includes performing, in a first module, a remote plasma treatment on a wafer to remove an oxide layer from the wafer by a reduction reaction. The method further includes transferring the pre-treated wafer from the first module to a second module under a vacuum. The method further includes forming, in the second module, an etch stop layer over the wafer.
    Type: Application
    Filed: June 26, 2013
    Publication date: January 1, 2015
    Inventors: Li CHEN, Jyh-Nan LIN, Chin-Feng SUN, Po-Hsiung LEU, Ding-I LIU
  • Publication number: 20140377961
    Abstract: A multi chamber thin film deposition apparatus and a method for depositing films, is provided. Each chamber includes a three dimensional gas delivery system including process gases being delivered downwardly toward the substrate and laterally toward the substrate. A pumping system includes an exhaust port in each chamber that is centrally positioned underneath the substrate being processed and therefore the gas flow around all portions of the edge of the substrate are equally spaced from the exhaust port thereby creating a uniform gas flow profile which results in film thickness uniformity of films deposited on both the front and back surfaces of the substrate. The deposited films demonstrate uniform thickness on the front and back of the substrate and extend inwardly to a uniform distance on the periphery of the backside of the substrate.
    Type: Application
    Filed: June 21, 2013
    Publication date: December 25, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lan Hai Wang, Ding-I Liu, Si-Wen Liao, Po-Hsiung Leu, Yong-Hung Yang, Chia-Ming Tai
  • Publication number: 20140349471
    Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.
    Type: Application
    Filed: August 11, 2014
    Publication date: November 27, 2014
    Inventors: Chih-Wei Chiang, Kuang-Cheng Wu, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu
  • Patent number: 8884404
    Abstract: The description relates to a method of patterning a semiconductor device to create a through substrate via. The method produces a through substrate via having no photoresist material therein. An intermediate layer deposited over an interlayer dielectric prevents etching solutions from etching interlayer dielectric sidewalls to prevent peeling. The description relates to a semiconductor apparatus including a semiconductor substrate having a through substrate via therein. The semiconductor apparatus further includes an interlayer dielectric over the semiconductor substrate and an intermediate layer over semiconductor substrate and over sidewalls of the interlayer dielectric.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Fang Li, Chun-Li Lin, Chun-Sheng Wu, Ding-I Liu
  • Patent number: 8872138
    Abstract: A UV curing system includes an enclosure defining an interior, a UV radiation source disposed within the interior of the enclosure, and a first window disposed within the interior of the enclosure. The first window creates a barrier that separates the UV radiation source and a processing chamber. A second window is disposed within the interior of the enclosure at a distance from the first window to define a gas channel. The second window defines a plurality of openings such that the gas channel is in fluid communication with the processing chamber. A gas inlet conduit is in fluid communication with the gas channel and is configured to introduce a cooling gas into the gas channel. A gas outlet is in fluid communication with the processing chamber and is configured to remove gas from the processing chamber.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: October 28, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Ying Lu, Sung-Po Yang, Ding-I Liu, Kuo-Shu Tseng, Chung-Wen Chang
  • Publication number: 20140306294
    Abstract: The present disclosure relates to an integrated chip IC having transistors with structures separated by a flowable dielectric material, and a related method of formation. In some embodiments, an integrated chip has a semiconductor substrate and an embedded silicon germanium (SiGe) region extending as a positive relief from a location within the semiconductor substrate to a position above the semiconductor substrate. A first gate structure is located at a position that is separated from the embedded SiGe region by a first gap. A flowable dielectric material is disposed between the gate structure and the embedded SiGe region and a pre-metal dielectric (PMD) layer disposed above the flowable dielectric material. The flowable dielectric material provides for good gap fill capabilities that mitigate void formation during gap fill between the adjacent gate structures.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Po-Chang Chen, Po-Hsiung Leu, Ding-I Liu
  • Publication number: 20140273537
    Abstract: A plasma reactor includes an enclosure having a top and a bottom and defining a processing chamber. Inlets are formed in the enclosure for injecting process gas into the chamber. An outlet is formed in the enclosure for withdrawing gas from the chamber. A platform is positioned to support a wafer in the chamber above the bottom. A plurality of coils is positioned above the top of the chamber. Each coil is coupled to a radio frequency generator.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Ching LO, Po-Hsiung LEU, Tzu-Chun LIN, Ding-I LIU, Jen-Chi CHANG, Ho-Ta CHUANG
  • Publication number: 20140231671
    Abstract: A UV curing system includes an enclosure defining an interior, a UV radiation source disposed within the interior of the enclosure, and a first window disposed within the interior of the enclosure. The first window creates a barrier that separates the UV radiation source and a processing chamber. A second window is disposed within the interior of the enclosure at a distance from the first window to define a gas channel. The second window defines a plurality of openings such that the gas channel is in fluid communication with the processing chamber. A gas inlet conduit is in fluid communication with the gas channel and is configured to introduce a cooling gas into the gas channel. A gas outlet is in fluid communication with the processing chamber and is configured to remove gas from the processing chamber.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Ying LU, Sung-Po Yang, Ding-I Liu, Kuo-Shu Tseng, Chung-Wen Chang
  • Patent number: 8803249
    Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: August 12, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Chiang, Kuang-Cheng Wu, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu
  • Publication number: 20140120706
    Abstract: A method of forming an interlayer dielectric film above a metal gate of a metal oxide semiconductor device comprises forming a metal gate above a semiconductor substrate; and forming the interlayer dielectric film above the metal gate by reacting a silicon-containing compound as precursor and a reactant for oxidizing the silicon-containing compound. The silicon-containing compound has the formula: Six(A)y(B)z(C)m(D)n ??(I) wherein x is in the range of from 1 to 9; y+z+m+n is in the range of from 4 to 20; and A, B, C, and D independently represent a functional group connecting with a silicon atom. The functional group is selected from a group consisting of alkyl, alkenyl, alkynyl, aryl, alkylaryl, alkoxyl, alkylcarbonyl, carboxyl, alkylcarbonyloxy, amide, amino, alkylcarbonylamino, —NO2, and —CN.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 1, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: LI Chen, Jyh-Nan Lin, Chin-Feng Sun, Po-Hsiung Leu, Ding-I Liu
  • Publication number: 20140042553
    Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Chiang, Kuang-Cheng Wu, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu
  • Publication number: 20140026813
    Abstract: An apparatus comprises a first gas inlet coupled between a first pipe and a reaction chamber, wherein the first pipe configured to carry process gases, a second gas inlet coupled between a second pipe and the reaction chamber, wherein the second pipe configured to carry a precursor material in a gaseous state and a heating device coupled to the second pipe and the second gas inlet, wherein the heating device keeps an ambient temperature of the second pipe and the second gas inlet above a boiling point of the precursor material.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 30, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lan-Hai Wang, Ding-I Liu, Si-Wen Liao, Po-Hsiung Leu, Yong-Hung Yang
  • Publication number: 20130319543
    Abstract: A production tool includes a chamber, a heater in the chamber, and a pumping outlet on a side of the heater. A pumping liner is in the chamber and encircling the heater. The pumping liner and the heater have a first gap therebetween and a second gap therebetween. The second gap is different from the first gap, and the second gap is farther away from the first pumping outlet than the first gap.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lan-Hai Wang, Ding-I Liu, Si-Wen Liao, Yong-Hung Yang, Jia-Wei Hsu
  • Publication number: 20130292791
    Abstract: In order to prevent formation of voids in STI film, after a second buried insulating layer is filled and planarized, a high density cap is formed embedded in the center region of the second buried insulating layer of the STI trench. The high density cap shields and protects the weaker center region of the second buried insulating layer of the STI trench from the subsequent processing steps and prevents formation of voids in the second buried insulating layer.
    Type: Application
    Filed: May 1, 2012
    Publication date: November 7, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Li LIN, Yi-Fang LI, Chun-Sheng WU, Po-Hsiung LEU, Ding-I LIU
  • Publication number: 20130228899
    Abstract: The description relates to a method of patterning a semiconductor device to create a through substrate via. The method produces a through substrate via having no photoresist material therein. An intermediate layer deposited over an interlayer dielectric prevents etching solutions from etching interlayer dielectric sidewalls to prevent peeling. The description relates to a semiconductor apparatus including a semiconductor substrate having a through substrate via therein. The semiconductor apparatus further includes an interlayer dielectric over the semiconductor substrate and an intermediate layer over semiconductor substrate and over sidewalls of the interlayer dielectric.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Fang LI, Chun-Li LIN, Chun-Sheng WU, Ding-I LIU
  • Publication number: 20130193350
    Abstract: A wafer curing apparatus including a plate configured to pass ultraviolet light. The wafer curing apparatus further includes an antireflective coating on a light incident surface of the plate. The antireflective coating has an opening in a central portion thereof. A method of curing a wafer including emitting ultraviolet light from an ultraviolet light source. The method further includes transmitting the ultraviolet light through an ultraviolet transmissive plate having an antireflective coating thereon. The antireflective coating including an opening in a central portion thereof. The method further includes irradiating a wafer with the ultraviolet light transmitted through the ultraviolet transmissive plate.
    Type: Application
    Filed: February 1, 2012
    Publication date: August 1, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Ying Lu, Ding-I Liu, Kuo-Shu Tseng, Yin-Bin Tseng, Tsung-Dar Lee, Wen-Hsiang Cheng
  • Publication number: 20130156940
    Abstract: The description relates to an adjustable nozzle capable of pivoting about an axis of the nozzle and translating along the axis of the nozzle. A high density plasma chemical vapor deposition (HDP CVD) chamber houses a plurality of adjustable nozzles. A feedback control system includes a control unit coupled to the adjustable nozzle and the HDP CVD chamber to form a more uniform thickness profile of films deposited on a wafer in the HDP CVD chamber.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ching WU, Wen-Long LEE, Ding-I LIU
  • Publication number: 20130043539
    Abstract: The present disclosure provides a method of making an integrated circuit. The method includes forming a gate stack on a semiconductor substrate; forming a stressed contact etch stop layer (CESL) on the gate stack and on the semiconductor substrate; forming a first dielectric material layer on the stressed CESL using a high aspect ratio process (HARP) at a deposition temperature greater than about 440 C to drive out hydroxide (OH) group; forming a second dielectric material layer on the first dielectric material layer; etching to form contact holes in the first and second dielectric material layers; filling the contact holes with a conductive material; and performing a chemical mechanical polishing (CMP) process.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 21, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Chi Chang, Chun-Li Lin, Kai-Shiung Hsu, Ming-Shiou Kuo, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu