Patents by Inventor Dirk Meyer
Dirk Meyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11849878Abstract: A brewing unit for a piston coffee machine is designed as a spindle brewing unit with an outer spindle and inner spindle, and with a brewing slide as a brewing chamber, two piston units in the form of a showerhead and a plunger, a drive motor, and at least one gearing mechanism.Type: GrantFiled: July 8, 2020Date of Patent: December 26, 2023Assignee: MELITTA PROFESSIONAL COFFEE SOLUTIONS GMBH & CO. KGInventors: Armin Hensel, Dirk Meyer, Bernd Buchholz
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Publication number: 20230149941Abstract: According to the present invention fragmented material 2, e.g. made from a material having Polyamides, is passing through a liquid bath 6 filled with liquid nitrogen 7 to cool the fragmented material 2 before entering a mill 10 for grinding the fragmented material 2. The fragmented material 2 is moved through the liquid bath 6 by exciting mechanical vibrations in the liquid bath 6 e.g. by a vibrational motor 28 coupled to the liquid bath 6 and/or an ultrasonic resonator 26 attached to the liquid bath 6. The invention allows to grind even materials being difficult to grind by reaching a temperature of ?150° C. and less before entering the mill 10 while avoiding a direct cooling e.g, by introducing liquid nitrogen directly into the mill 10.Type: ApplicationFiled: November 15, 2022Publication date: May 18, 2023Inventor: Dirk Meyer
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Publication number: 20220225814Abstract: A brewing unit for a piston coffee machine is designed as a spindle brewing unit with an outer spindle and inner spindle, and with a brewing slide as a brewing chamber, two piston units in the form of a showerhead and a plunger, a drive motor, and at least one gearing mechanism.Type: ApplicationFiled: July 8, 2020Publication date: July 21, 2022Applicant: Melitta Professional Coffee Solutions GmbH & Co. KGInventors: Armin HENSEL, Dirk MEYER, Bernd BUCHHOLZ
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Patent number: 11321514Abstract: Aspects of the present disclosure address systems and methods for clock tree synthesis (CTS). A first iteration of CTS is performed to generate an intermediate clock tree for an integrated circuit (IC) design that includes one or more macros. Target pin insertion delays (PIDs) for the one or more macros are computed based on the intermediate clock tree using a linear program. A second iteration of CTS is performed using the target PIDs for the one or more macros to generate an optimized clock tree for the IC design.Type: GrantFiled: December 31, 2020Date of Patent: May 3, 2022Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Ben Thomas Beaumont, Zhuo Li
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Publication number: 20220080549Abstract: Semiconductor wafers are polished simultaneously on both the front and the rear sides between an upper polishing plate and a lower polishing plate, each covered with a polishing pad, wherein a polishing gap (x1+x2) corresponding to a difference in the respective distances between facing surfaces of upper polishing pad and lower polishing pad which come into contact with the semiconductor wafer at the inner edge and at the outer edge of the polishing pads is changed incrementally or continuously during the polishing process.Type: ApplicationFiled: February 5, 2019Publication date: March 17, 2022Applicant: SILTRONIC AGInventors: Alexander HEILMAIER, Vladimir DUTSCHKE, Leszek MISTUR, Torsten OLBRICH, Dirk MEYER, Vincent NG
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Publication number: 20210235934Abstract: The invention relates to a grinder for grinding coffee beans. The grinder has a first grinding tool and a second grinding tool which form a grinding gap and are rotatable relative to each other to grind coffee beans in the gap. A force generation device is arranged for applying a force, which is adjustable during operation, to one or both of the first grinding tool and second grinding tool, which force is transferable to the coffee beans. The invention also relates to a method for grinding coffee beans with the grinder for preparing a hot beverage.Type: ApplicationFiled: June 27, 2019Publication date: August 5, 2021Applicant: MELITTA PROFESSIONAL COFFEE SOLUTIONS GMBH & CO. KGInventors: Armin HENSEL, Bernd BUCHHOLZ, Dirk MEYER
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Patent number: 10960591Abstract: A method for carrying out a cyclical manufacturing process produces parts within a predefined quality tolerance. After at least one process adjustment variable is changed, a quality feature of the parts produced with a changed process adjustment variable is checked against the range of the quality tolerance of the produced parts. A process characteristic variable zone is formed in an automated manner using at least one determined process characteristic variable variant that is process-stable and for which the process adjustment variable produces acceptable parts.Type: GrantFiled: February 16, 2017Date of Patent: March 30, 2021Assignee: Kistler Holding AGInventors: Daniel Fick, Guenter Haag, Dirk Meyer, Philipp Liedl
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Patent number: 10929589Abstract: Various embodiments provide for generating a routing structure for a clock network based on edge interaction detection, which can facilitate detection/consideration of overuse of routing resources to a balanced routing structure and which may be part of electronic design automation (EDA) of a circuit design. For example, some embodiments use an edge intersection check to detect overuse of routing resources within the routing structure for a clock network.Type: GrantFiled: March 19, 2020Date of Patent: February 23, 2021Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Zhuo Li
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Patent number: 10836088Abstract: A time variation of an internal pressure of the molding cavity of a multi-phase injection molding machine is detected and represented as an internal pressure graph. An internal pressure graph recorded during a production cycle that produced an injection molded part satisfying a predefined quality characteristic is used as a reference graph. If the internal pressure graph of the current production cycle exceeds a predefined threshold value, then a current machine parameter is changed so as to adapt an internal pressure graph of a subsequent production cycle to the reference graph. Each phase of the production cycle is assigned its own machine parameter determined to have a significant impact on the quality of the parts produced. The assigned machine parameters are changed in a predefined order in a plurality of production cycles wherein exactly one assigned machine parameter is changed per production cycle.Type: GrantFiled: April 24, 2018Date of Patent: November 17, 2020Assignee: KISTLER HOLDING, AGInventors: Daniel Fick, Dirk Meyer, Philipp Liedl
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Patent number: 10706202Abstract: Systems, methods, media, and other such embodiments described herein relate to generation of routing trees. One embodiment involves accessing a circuit design with a source and a plurality of sinks, and then using a first bottom-up wavefront analysis to select branch point candidates for the sinks. A branch point cost function is used to select among the branch point candidates. This process may be repeated until a final tier of analysis results in a final wavefront that is within a threshold distance of the source. The selected branch points are then used in generating a routing tree between the source and the sinks. In various different embodiments, different cost point functions may be used, and different operations used to manage obstructions or other specific routing considerations.Type: GrantFiled: December 20, 2018Date of Patent: July 7, 2020Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Zhuo Li
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Patent number: 10643014Abstract: Systems, methods, media, and other such embodiments described herein relate to generation of routing trees. One embodiment involves accessing a circuit design comprising an irregular sink arrangement. Different grid templates may be identified for assisting with balanced routings at different levels of a routing tree to connect the sinks of the circuit design. As part of such operations, costs for different routings using the different grid templates are calculated and compared. A lowest cost routing for each grid template are identified. These costs are normalized across different grid templates, and a lowest cost routing across all grid templates is selected. In various embodiments, various costs values based on sink pairing, isolated sinks, and node position for a next level of a routing tree are considered.Type: GrantFiled: December 20, 2018Date of Patent: May 5, 2020Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Zhuo Li
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Patent number: 10380287Abstract: Electronic design automation systems, methods, and media are presented for modifying a balanced clock structure. One embodiment involves accessing a circuit design comprising an H-tree clock distribution network that provides a clock signal to a plurality of sinks. Timing requirements for each sink are identified, and a plurality of early tapoff candidate locations are also identified. A corresponding arrival time adjustment associated with each early tapoff candidate location is estimated for early sinks, and an early tapoff location is selected for each early sink based on the early arrival timing requirement and the arrival time adjustment associated with the tapoff location. In various embodiments, different criteria may be used for selecting the early tapoff location, and updated circuit designs are then generated with a route from early sinks to the early tapoff location selected for each early sink.Type: GrantFiled: June 29, 2017Date of Patent: August 13, 2019Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Zhuo Li, Charles Jay Alpert
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Patent number: 10282506Abstract: Systems, methods, media, and other such embodiments described herein relate to generation of clock routing trees. One embodiment involves accessing a circuit design and a clock tree hierarchy input indicating a nested list of partition or sink groups, each group of the nested list of groups comprising one or more clock tree elements of a plurality of clock tree elements from the circuit design. A routing topology associated with a source and a plurality of sinks are determined based on an ordering within the nested list of partition groups. These routing directions are used in synthesizing a clock tree for the circuit design. In additional embodiments, the clock tree hierarchy input provides clustering information, port placement for connections between partition groups of the clock tree, and parameters describing limitations or criteria for individual partition groups.Type: GrantFiled: August 28, 2017Date of Patent: May 7, 2019Assignee: Cadence Design Systems, Inc.Inventors: Dirk Meyer, Zhuo Li, Charles Jay Alpert
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Publication number: 20190039274Abstract: A method for carrying out a cyclical manufacturing process produces parts within a predefined quality tolerance. After at least one process adjustment variable is changed, a quality feature of the parts produced with a changed process adjustment variable is checked against the range of the quality tolerance of the produced parts. A process characteristic variable zone is formed in an automated manner using at least one determined process characteristic variable variant that is process-stable and for which the process adjustment variable produces acceptable parts.Type: ApplicationFiled: February 16, 2017Publication date: February 7, 2019Inventors: DANIEL FICK, GUENTER HAAG, DIRK MEYER, PHILIPP LIEDL
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Publication number: 20180304513Abstract: A time variation of an internal pressure of the molding cavity of a multi-phase injection molding machine is detected and represented as an internal pressure graph. An internal pressure graph recorded during a production cycle that produced an injection molded part satisfying a predefined quality characteristic is used as a reference graph. If the internal pressure graph of the current production cycle exceeds a predefined threshold value, then a current machine parameter is changed so as to adapt an internal pressure graph of a subsequent production cycle to the reference graph. Each phase of the production cycle is assigned its own machine parameter determined to have a significant impact on the quality of the parts produced. The assigned machine parameters are changed in a predefined order in a plurality of production cycles wherein exactly one assigned machine parameter is changed per production cycle.Type: ApplicationFiled: April 24, 2018Publication date: October 25, 2018Inventors: DANIEL FICK, DIRK MEYER, PHILIPP LIEDL
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Publication number: 20110139867Abstract: A method for information retrieval in a communication network includes step 1) of transmitting a reference information from a mobile source device to a network instance. The reference information includes at least one of an image of a barcode from an accessible media and a related information that is derived from the barcode. The source device includes a Public Land Mobile Network interface and the reference information is transmitted via the Public Land Mobile Network interface. A second step 2) includes transmitting a target information, including information related to a selected target device, to the network instance, the target information being transmitted via the Public Land Mobile Network interface. A third step 3) includes transmitting a usable information from the network instance to the target device, the usable information being related to the reference information and including a media content that is used by the target device at a predetermined time.Type: ApplicationFiled: December 10, 2010Publication date: June 16, 2011Applicant: DEUTSCHE TELEKOM AGInventor: Dirk Meyer
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Patent number: 7716613Abstract: A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.Type: GrantFiled: March 1, 2007Date of Patent: May 11, 2010Assignee: Qimonda AGInventors: Dirk Meyer, Thomas Roessler
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Patent number: 7475376Abstract: In one embodiment, an automatic check is performed to determine if the output of a parent region is compatible with the output of a current region of a cell. If the output of the parent region is compatible with the output of the current region of a cell, the output of the parent region is reduced (e.g., an ANDNOT operation) taking into account the current region. If the output of the parent region is not compatible with the output of the current region of a cell, the incompatible output of the sub-region is copied to a promote container and the incompatible output is promoted to the output of all other parent regions. These steps are performed for all parent regions. The layout hierarchy is first generated from the input data, and then is also generated from the region data. The difference between the layout hierarchy generated from the input data and the layout hierarchy generated from the region data is determined.Type: GrantFiled: June 6, 2006Date of Patent: January 6, 2009Assignee: Qimonda AGInventors: Alexander Seidl, Dirk Meyer
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Publication number: 20080240942Abstract: A diaphragm pump for pumping a fluid, includes a flexible diaphragm which contains magnetically hard or soft particles and is actuated by an electromagnetic actuator. The diaphragm pump having a housing having an interior space containing two pump chambers which are separated by the diaphragm, and in that the diaphragm is actuated by two opposite electromagnetic actuators.Type: ApplicationFiled: March 20, 2008Publication date: October 2, 2008Applicant: Carl Freudenberg KGInventors: Ralf Heinrich, Dirk Meyer, Thomas Schauber, Christoph Gund, Benno Schmied, Christopher Klatt, Torsten Gerlich, Joerg Bittner, Volker Daume
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Patent number: 7310791Abstract: A method for correcting layout errors of a layout, for example layout errors of a layout of an electronic circuit, is disclosed. In order to be able to correct such layout errors with the least possible complexity, the layout is examined for the presence of layout errors with the aid of predetermined design rules, identical layout errors are combined in a respective error class, and all layout errors of an error class that are still present are automatically corrected without further checking in an identical manner as soon as the correction of a layout error of the respective error class that is used as an error representative has been performed.Type: GrantFiled: July 27, 2005Date of Patent: December 18, 2007Assignee: Infineon Technologies AGInventors: Dirk Meyer, Uwe Mueller