Abstract: A method for correcting layout errors of a layout, for example layout errors of a layout of an electronic circuit, is disclosed. In order to be able to correct such layout errors with the least possible complexity, the layout is examined for the presence of layout errors with the aid of predetermined design rules, identical layout errors are combined in a respective error class, and all layout errors of an error class that are still present are automatically corrected without further checking in an identical manner as soon as the correction of a layout error of the respective error class that is used as an error representative has been performed.

Abstract: A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.

Abstract: A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.

Abstract: In one embodiment, an automatic check is performed to determine if the output of a parent region is compatible with the output of a current region of a cell. If the output of the parent region is compatible with the output of the current region of a cell, the output of the parent region is reduced (e.g., an ANDNOT operation) taking into account the current region. If the output of the parent region is not compatible with the output of the current region of a cell, the incompatible output of the sub-region is copied to a promote container and the incompatible output is promoted to the output of all other parent regions. These steps are performed for all parent regions. The layout hierarchy is first generated from the input data, and then is also generated from the region data. The difference between the layout hierarchy generated from the input data and the layout hierarchy generated from the region data is determined.

Abstract: At least one cell pair graph is generated for cells of the layout. A partial inverse layout tree is determined from the cell pair graph. For the partial inverse layout tree, only branches of the complete inverse layout tree are considered that describe an interaction between shapes of different cells. A data set is generated from the partial inverse layout tree and the data set is saved, for example, by using the partial inverse layout tree.

Abstract: A printing process for the transfer of printing substance (2) from an ink carrier (1) to an imprinting material (6), in which, with the help of an energy-emitting apparatus, which, during a process period, emits energy in the form of electromagnetic waves (3), and the printing substance (2) undergoes a change in volume and/or position, wherein, with the help of absorption bodies (4), energy is transferred from the electromagnetic waves (3) into the printing substance (2). The invention also includes an apparatus for practicing the process of the invention and a printing substance containing absorption bodies.

Abstract: A method for optimizing the geometry of structural elements of a circuit pattern involves providing an overall circuit pattern of the circuit design and a plurality of basic patterns. Subsequently, the circuit pattern of the circuit design is iteratively decomposed into corresponding basic patterns in order to classify those parts of the circuit pattern of the plurality of structural elements wherein there exists a match with the basic pattern. Subsequently, further basic patterns are determined for those parts of the circuit pattern which were not previously classified. After applying a specification for optimizing the geometry of the structural elements, the optimized basic patterns are inserted into the circuit design thus achieving an improvement of the optical imaging properties.

Abstract: A component has a substrate of silicon or silicate glass and a crystalline aluminum silicate coating of the system aluminum oxide/silicon oxide. The crystalline aluminum silicate coating is intergrown with the substrate so as to form an intermixed zone, wherein the intermixed zone has at least one of a concentration gradient and a structure gradient. The component is prepared by applying an aluminum oxide layer on a substrate of silicon or silicate glass and by carrying out a heat treatment under vacuum conditions at temperatures greater than 1100° C. during or after the step of applying.

Abstract: A method for correcting layout errors of a layout, for example layout errors of a layout of an electronic circuit, is disclosed. In order to be able to correct such layout errors with the least possible complexity, the layout (10) is examined for the presence of layout errors (20, 30) with the aid of predetermined design rules, identical layout errors (20, 30) are combined in a respective error class, and all layout errors (30) of an error class that are still present are automatically corrected without further checking in an identical manner as soon as the correction of a layout error (20) of the respective error class that is used as an error representative has been performed.

Abstract: A printing process for the transfer of printing substance (2) from an ink carrier (1) to an imprinting material (6), in which, with the help of an energy-emitting apparatus, which, during a process period, emits energy in the form of electromagnetic waves (3), and the printing substance (2) undergoes a change in volume and/or position, wherein, with the help of absorption bodies (4), energy is transferred from the electromagnetic waves (3) into the printing substance (2). The invention also includes an apparatus for practicing the process of the invention and a printing substance containing absorption bodies.

Abstract: In order to compensate for the shortening of line ends (30) in a circuit design of an integrated circuit, in a first step, hammerheads or serifs (50) are attached to the line ends (30) by means of rule-based OPC corrections. The line ends modified in this way are revised further by downstream application of a simulation-based OPC correction before mask or direct wafer writer data are calculated. As a result of the formation of the pattern revised by the simulation-based correction on the wafer, there actually arises in an approximate manner owing to the proximity effects the layout created by the rule-based correction with the supplemented line ends (30) on the wafer.

Abstract: An accelerator module actuated by the driver's foot for controlling the output of a driving engine or motor of a motor vehicle employs a friction element for generating a friction hysteresis for the purpose of achieving a comfortable driving feel. Support of the pedal lever is completely independent of the generation of the friction hysteresis, resulting in a particularly favorable, especially stable, and play-free support of the pedal lever, and the brake insert for generating the friction hysteresis is particularly easy to manufacture.

Abstract: A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.

Abstract: In transmitters actuated by the driver's foot, which are for controlling the output of a driving engine, a friction element is provided for generating a friction hysteresis for the purpose of achieving a comfortable driving feel.

Abstract: Masks are produced for the fabrication of semiconductor structures based on layout data that has information for defining a mask layout with individual geometric structure elements. Layout data generated previously for a mask layout is checked to see whether geometric design requirements are satisfied. In the event of a violation of design requirements, the corresponding error locations in the mask layout are located. Further layout data are then generated, which contain information for defining correction figures to correct the respective error locations. The further layout data are linked with the layout data, so that the layout data are modified. This permits automated modification of the layout data and their technology-dependent optimization.

Abstract: In a gas pedal not pivotably connected to the passenger compartment floor, there has been the problem until now that the pivoting motion of the gas pedal is not perceived as being as comfortable as when a gas pedal pivotably connected to the passenger compartment floor is actuated. In the drive pedal module (1) proposed here, it is attained that the pedal lever (10) together with the footrest surface (20) lends the same sensation to the driver's foot as if the pedal lever (10) were secured to the passenger compartment floor (26). The drive pedal module is intended for controlling the travel speed of a vehicle.

Abstract: Masks are produced for the fabrication of semiconductor structures based on layout data that has information for defining a mask layout with individual geometric structure elements. Layout data generated previously for a mask layout is checked to see whether geometric design requirements are satisfied. In the event of a violation of design requirements, the corresponding error locations in the mask layout are located. Further layout data are then generated, which contain information for defining correction figures to correct the respective error locations. The further layout data are linked with the layout data, so that the layout data are modified. This permits automated modification of the layout data and their technology-dependent optimization.

Abstract: For phosphating metal surfaces which consist at least in part of aluminum, by means of phosphating solutions which contain zinc, phosphate and fluoride, any titanium which has entered the phosphating solution and would disturb the formation of the layer is precipitated by an addition of SiO-containing compounds and after the precipitate has been removed, the content of free fluoride is readjusted to the required concentration. Particularly suitable compounds which contain SiO, consist of alkali metasilicate, alkali orthosilicate and/or alkali disilicate, preferably used in an amount of 0.05 to 1 g/l of the phosphating solution, or of silica, which is preferably used in an amount of 0.5 to 10 g per liter of the phosphating solution (calc. as Si).