Patents by Inventor Dirk Reese

Dirk Reese has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120274353
    Abstract: Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 1, 2012
    Applicant: ALTERA CORPORATION
    Inventors: Bruce B. Pedersen, Dirk A. Reese
  • Patent number: 7924049
    Abstract: Provided is a method and system to transmit data to a configurable integrated circuit that features delaying a capture edge of a clock signal at a data latch to synchronize the receipt of data at the data latch that was transmitted in response to a storage device receiving a launch edge of the clock signal. The method includes transmitting the clock signal having the launch edge and the capture edge to the storage device. The data is launched from the storage device to the integrated circuit in response to the storage device sensing the launch edge. Receipt of the capture edge at the data latch is delayed for a predetermined time to compensate for a delay between transmitting the launch edge and launching the data to ensure the data is latched by the data latch. Also disclosed is a system that carries out the function of the method.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: April 12, 2011
    Assignee: Altera Corporation
    Inventors: Keith Duwel, Balaji Margabandu, Dirk A. Reese, Leo Min Maung
  • Patent number: 7702893
    Abstract: Systems and methods are provided for avoiding memory address conflicts in systems containing shared memory. Upon system power up, programmable logic device integrated circuits, microprocessors, and other integrated circuits with processing capabilities are provided with unique initialization data memory addresses. Each unique initialization data memory address corresponds to a respective non-overlapping block of memory in the shared memory. During initialization operations, the integrated circuits retrieve initialization data from the shared memory using the unique initialization data memory addresses. The integrated circuits can be organized using a master-slave architecture. The master can load the initialization data memory addresses into the slave integrated circuits using communications circuitry that is active after the slaves have powered up but before the slaves have been initialized.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: April 20, 2010
    Assignee: Altera Corporation
    Inventors: Nicholas J. Rally, Dirk A. Reese, Keith Duwel
  • Patent number: 6970024
    Abstract: Circuits, methods, and apparatus for protecting devices in an output stage from over-voltage conditions caused by high supply and input voltages. Embodiments provide over-voltage protection that operates over a range of voltage levels, and that can be optimized for performance at different voltage levels. An exemplary embodiment of the present invention uses stacked devices to protect n and p-channel output devices from excess supply and input voltages. These stacked devices are biased by voltages received at their gates. These gate voltages vary as a function of supply voltage to maintain performance. Other embodiments of the present invention provide a body bias switch that generates a bias for the bulk of p-channel output devices. This bias tracks the higher of a supply or input voltage, such that parasitic drain-to-bulk diodes do not conduct. A switch may be provided that shorts the bulk connection to VCC under appropriate conditions.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: November 29, 2005
    Assignee: Altera Corporation
    Inventors: Dirk Reese, Tzung-Chin Chang, Chiakang Sung, Khai Nguyen, Gopinath Rangan, Xiaobao Wang
  • Patent number: 6184703
    Abstract: An output buffer comprising control circuit for reducing the amount of ground and/or power bounce noise. The output buffer further includes one or more driver devices. The output current of the driver device(s) is limited by providing an intermediate drive voltage to the control electrode of the driver device. A pass device (or a transmission gate) provides the intermediate drive voltage and also operates as a variable resistive device that limits the slew rate of the drive voltage. The operation of the pass device can be dependent on a signal level at the output of the output buffer. When the output has transitioned to a new logic state, the new logic level is fed back to change the operating state of the pass device, thus ensuring that the output voltage meets the output VOL and VOH specifications.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: February 6, 2001
    Assignee: Altera Corporation
    Inventors: William B. Vest, Dirk A. Reese, Myron W. Wong, John C. Costello
  • Patent number: 5850365
    Abstract: The present invention is a sense amplifier circuit for use with programmable logic devices that provides improved switching time by actively limiting the voltage swing on the bit line which it is sensing, rather than passively sensing the voltage, employs feedback circuits to further improve switching time and may be selectively operated in low power mode without significant reduction in switching speed. Voltage reference control circuitry, comprising variable current limiters controlled by the potential of a supply of reference potential, can be added to improve noise immunity. The circuitry of the supply of reference potential is designed so that its sensitivity to fabrication variations is substantially similar to that of the sense amplifier and so that it adjusts the reference potential accordingly.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: December 15, 1998
    Assignee: Altera Corporation
    Inventors: Dirk A. Reese, Myron W. Wong, John C. Costello
  • Patent number: 5525917
    Abstract: The present invention is a sense amplifier circuit for use with programmable logic devices, that provides improved switching time by actively limiting the voltage swing on the bit line which it is sensing, rather than passively sensing the voltage, and that employs feedback circuits to further improve switching time. Voltage reference control circuitry, comprising variable current limiters controlled by the potential of a supply of reference potential, can be added to improve noise immunity. The circuitry of the supply of reference potential is designed so that its sensitivity to fabrication variations is substantially similar to that of the sense amplifier and so that it adjusts the reference potential accordingly.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: June 11, 1996
    Assignee: Altera Corporation
    Inventors: Myron W. Wong, Dirk A. Reese, John C. Costello
  • Patent number: 5086079
    Abstract: A process for producing styrene-containing polymers having a narrow particle size distribution, comprising the steps:(i) preparing a polymerization mixture, said mixture comprisinga) an organic phase comprising at least 50 wt %. styrene and a monomer-soluble polymerization initiator, andb) an aqueous phase comprising water, an organic protective colloid and a substantially water insoluble inorganic suspension stabilizer;(ii) adding to said polymerization mixture 50-500 ppm of a metal carbonate, bicarbonate or mixtures thereof based on said aqueous phase; and(iii) polymerizing said polymer mixture to produce said styrene-containing polymer particles.
    Type: Grant
    Filed: January 10, 1991
    Date of Patent: February 4, 1992
    Assignee: Huels Aktiengesellschaft
    Inventors: Dirk Reese, Horst Leithoeuser
  • Patent number: 4853038
    Abstract: The invention relates to the preparation of low-viscosity aqueous dispersions of glycerol esters of long-chain fatty acids by dispersing under mechanical agitation in the aqueous phase, wherein the starting material is constituted by soap-free glycerol esters having a content of less than 2% by weight of free glycerol esters, a content is set of 0.5-6% by weight of alkali soaps of long-chain fatty acids. The dispersions are utilized for the coating of expandable finely divided styrene polymers.
    Type: Grant
    Filed: June 12, 1987
    Date of Patent: August 1, 1989
    Assignee: Huels Aktiengesellschaft
    Inventors: Horst Leithaeuser, Dirk Reese, Walter Trautmann
  • Patent number: 4609512
    Abstract: A process for controlling bead size in the manufacture of expandable styrene polymers by suspension polymerization, wherein, referred to the aqueous phase, a concentration of ions of calcium, aluminum, metals of the 1st, 2nd, or 6th through 8th side groups of the period table of elements of 3.times.10.sup.31 5 to 3.times.10.sup.-2 % by mass is established, these metal ions being present as cations in the higher oxidation stage of water-soluble, inorganic salts.
    Type: Grant
    Filed: August 27, 1984
    Date of Patent: September 2, 1986
    Assignee: Chemische Werke Huls AG
    Inventors: Josef K. Rigler, Dirk Reese, Horst Leithauser
  • Patent number: 4517314
    Abstract: Fine particulate expandable styrene polymers suitable for the production of molded bodies with improved minimum mold dwell times, containing 0.01 to 2.0% by weight, referred to the polystyrene or the total of the polymerized monomers, of polyoctenamer having I values from about 10 to 400 ml/g and trans octylene contents from about 20 to 90%.
    Type: Grant
    Filed: October 17, 1984
    Date of Patent: May 14, 1985
    Assignee: Chemische Werke Huls AG
    Inventors: Dirk Reese, Josef K. Rigler
  • Patent number: 4497912
    Abstract: Fine particulate expandable styrene polymers suitable for the production of molded bodies with improved minimum mold dwell times, containing 0.01 to 2.0% by weight, referred to the polystyrene or the total of the polymerized monomers, of polyoctenamer having I values from about 10 to 400 ml/g and trans octylene contents from about 20 to 90%.
    Type: Grant
    Filed: June 18, 1984
    Date of Patent: February 5, 1985
    Assignee: Chemische Werke Huls AG
    Inventors: Dirk Reese, Josef K. Rigler