Patents by Inventor Dmitry Vaysman

Dmitry Vaysman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210110866
    Abstract: A storage device having a wide range of operating temperatures is disclosed. Techniques disclosed herein may be used to operate MLC cells at higher temperatures before resorting to thermal throttling. Techniques disclosed herein may be used to operate MLC cells at lower temperatures without needing to pre-heat the storage device. SLC data stored in a first group of memory cells is folded to MLC data stored in a second group of memory cells while an operating temperature is outside a first temperature range. After the operating temperature is within a second temperature range, the data integrity of the MLC data is checked. The SLC data in the first group is folded to MLC data in a third group of memory cells responsive to the MLC data in the second group failing the data integrity check. The foregoing permits the storage device to increase its range in operating temperatures.
    Type: Application
    Filed: June 25, 2020
    Publication date: April 15, 2021
    Applicant: Western Digital Technologies, Inc.
    Inventors: Raghavendra Gopalakrishnan, Joanna Lai, Dmitry Vaysman
  • Publication number: 20200401207
    Abstract: For solid state drive (SSD) or other memory system formed of multiple memory dies, techniques are presented for operation in a standby mode with increased power savings. The memory dies are operable in a regular standby mode and in a low power standby mode. Based upon the amount of current each of the memory dies in the regular standby mode, when the device goes into standby the memory dies that draw higher amounts of current when in the regular standby mode are instead placed into the low power standby mode. The amount of current drawn by each of the memory die in the regular standby mode can be determined for each of the memory dies at die sort or as part of the memory test process, or can be determine by an assembled SSD itself.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Applicant: Western Digital Technologies, Inc.
    Inventors: Nian Niles Yang, Dmitry Vaysman, Ekram Bhuiyan
  • Publication number: 20200333870
    Abstract: The present disclosure generally relates to split, non-operational power states for a data storage device. The data storage device can transition between the split, non-operational power states without advertising the transition to the host device. The power state parameters that are advertised to the host device are adjusted such that the host device is guided to the correct power decision based on the advertised power and duration. By splitting the non-operational power states, the data storage device does not incur additional transitional energy costs for short idle durations.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 22, 2020
    Inventors: Dmitry VAYSMAN, Eran EREZ, Judah Gamliel HAHN, Sartaj AJRAWAT
  • Patent number: 10379139
    Abstract: Systems and methods are disclosed for testing circuit modules. A system for testing a circuit module includes a test circuit board configured to interface with a host system, a standard connector implemented on the test circuit board and configured to be attachably coupled to the circuit module, a micro-backplane module configured to be attachably coupled to the circuit module and a micro-backplane module interface connector implemented on the test circuit board and configured to be attachably coupled to the micro-backplane module.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: August 13, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Sohail Mallick, Dmitry Vaysman, Hyun Soo Kim, Brian Hokyee Tse, Hariharan Venkataramani
  • Publication number: 20180315483
    Abstract: A storage system and method for handling overheating of the storage system are disclosed. The method comprises determining whether a temperature sensed by a temperature sensor is above a first threshold temperature; and in response to determining that the temperature sensed by the temperature sensor is above the first threshold temperature, lowering a voltage supplied by a power supply to one or more components in the storage system comprising transistors, wherein lowering the voltage supplied to the one or more components reduces temperature by reducing leakage current of the transistors.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 1, 2018
    Applicant: Western Digital Technologies, Inc.
    Inventors: Nian Niles Yang, Eran Erez, Zelei Guo, Dmitry Vaysman
  • Patent number: 10115471
    Abstract: A storage system and method for handling overheating of the storage system are disclosed. The method comprises determining whether a temperature sensed by a temperature sensor is above a first threshold temperature; and in response to determining that the temperature sensed by the temperature sensor is above the first threshold temperature, lowering a voltage supplied by a power supply to one or more components in the storage system comprising transistors, wherein lowering the voltage supplied to the one or more components reduces temperature by reducing leakage current of the transistors.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: October 30, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nian Niles Yang, Eran Erez, Zelei Guo, Dmitry Vaysman
  • Publication number: 20180299485
    Abstract: Systems and methods are disclosed for testing circuit modules. A system for testing a circuit module includes a test circuit board configured to interface with a host system, a standard connector implemented on the test circuit board and configured to be attachably coupled to the circuit module, a micro-backplane module configured to be attachably coupled to the circuit module and a micro-backplane module interface connector implemented on the test circuit board and configured to be attachably coupled to the micro-backplane module.
    Type: Application
    Filed: June 13, 2017
    Publication date: October 18, 2018
    Inventors: SOHAIL MALLICK, DMITRY VAYSMAN, HYUN-SOO KIM, BRIAN HOKYEE TSE, HARIHARAN VENKATARAMANI
  • Publication number: 20180284857
    Abstract: The present disclosure discloses a memory device including a control system for thermal throttling. The control system acquires the temperature of a non-volatile memory element from a temperature detector at a first frequency. Upon determining that the temperature of the non-volatile memory element is above a pre-determined threshold, the control system acquires the temperature of the non-volatile memory element from the temperature detector at a second frequency that is higher than the first frequency and activates the thermal throttling for the non-volatile memory element.
    Type: Application
    Filed: March 29, 2017
    Publication date: October 4, 2018
    Inventors: Nian Niles YANG, Dmitry VAYSMAN, Eran EREZ, Grishma SHAH
  • Patent number: 9811267
    Abstract: A non-volatile storage apparatus comprises a controller, one or more memory packages, a system temperature sensor, and one or more memory temperature sensors. The system temperature sensor is located at or on the controller. Each of the one or more memory temperature sensors are positioned at one of the one or more memory packages. The controller monitors system temperature using the system temperature sensor. If the system temperature is above a first threshold, then temperature is sensed at the memory packages using the one or more memory temperature sensors. Individual memory packages have their performance throttled if their temperature exceeds a second threshold.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: November 7, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Nian Niles Yang, Grishma Shah, Phil Reusswig, Dmitry Vaysman
  • Patent number: 9343165
    Abstract: A system for optimizing drive strength may be utilized for identifying the maximum data transfer rate for different devices and different device configurations. The drive strength may be optimized for input/output (I/O) devices by measuring voltage drops on I/O power supply using different test patterns. The maximum drive strength is identified that satisfies a limit or threshold for the allowed voltage drop level. The test pattern may include a simultaneous toggling of each I/O device. A slew rate for the device may be utilized along with the drive strength for identifying the maximum data transfer rate.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: May 17, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Dmitry Vaysman, Arkady Katz
  • Publication number: 20140185388
    Abstract: A system for optimizing drive strength may be utilized for identifying the maximum data transfer rate for different devices and different device configurations. The drive strength may be optimized for input/output (I/O) devices by measuring voltage drops on I/O power supply using different test patterns. The maximum drive strength is identified that satisfies a limit or threshold for the allowed voltage drop level. The test pattern may include a simultaneous toggling of each I/O device. A slew rate for the device may be utilized along with the drive strength for identifying the maximum data transfer rate.
    Type: Application
    Filed: February 27, 2013
    Publication date: July 3, 2014
    Inventors: Dmitry Vaysman, Arkady Katz