Patents by Inventor Dominik Scholz
Dominik Scholz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190027666Abstract: An optoelectronic component includes a light emitting semiconductor chip, including an emission side and comprising an underside, wherein the optoelectronic component is configured to emit light via the emission side, the optoelectronic component including an insulating layer, the light emitting semiconductor chip is embedded into the insulating layer, the light emitting semiconductor chip including two electrical contact locations, the contact locations face away from the emission side, a first and a second electrically conductive contact layer are provided, respectively, an electrically conductive contact layer electrically conductively connects to a contact location of the semiconductor chip, the electrically conductive contact layers are arranged in the insulating layer, the first electrically conductive contact layer adjoins a first side face of the optoelectronic component, and the second electrically conductive contact layer adjoins a second side face of the optoelectronic component.Type: ApplicationFiled: January 26, 2017Publication date: January 24, 2019Applicant: OSRAM Opto Semiconductors GmbHInventors: Dominik Scholz, Siegfried Herrmann
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Publication number: 20190013434Abstract: A method for manufacturing an optoelectronic component includes providing a growth substrate; applying a succession of semiconductor layers; structuring the succession of semiconductor layers; applying a sacrificial layer; depositing a metal layer; optionally planarizing using a dielectric material; forming a second terminal contact through the active region; applying a permanent support; and detaching the growth substrate and exposing the metal layer.Type: ApplicationFiled: February 24, 2017Publication date: January 10, 2019Inventors: Dominik Scholz, Alexander F. Pfeuffer, Isabel Otto
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Publication number: 20180358509Abstract: A method for producing a plurality of components and a component are disclosed. In an embodiment the method includes providing a carrier composite comprising a base body and a planar connecting surface, providing a wafer composite comprising a semiconductor body composite and a planar contact surface, connecting the wafer composite to the carrier composite thereby forming a joint composite so that the planar contact surface and the planar connecting surface are joined forming a joint boundary surface. The method further includes reducing inner mechanical stress in the joint composite so that a material of the carrier composite is removed in places, wherein the joint composite is thermally treated in order to form a permanent mechanically-stable connection between the wafer composite and the carrier composite, and wherein reducing inner stress is effected prior to the thermal treatment.Type: ApplicationFiled: November 30, 2016Publication date: December 13, 2018Inventors: Sophia Huppmann, Simeon Katz, Marcus Zenger, Dominik Scholz
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Patent number: 10134960Abstract: In at least one embodiment, the semiconductor layering sequence (1) is designed for generating light and comprises semiconductor columns (2). The semiconductor columns (2) have a respective core (21) made of a semiconductor material of a first conductivity type, and a core shell (23) surrounding the core (21) made of a semiconductor material of a second conductivity type. There is an active zone (22) between the core (21) and the core shell (23) for generating a primary radiation by means of electroluminescence. A respective conversion shell (4) is placed onto the semiconductor columns (2), which conversion shell at least partially interlockingly surrounds the corresponding core shell (23), and which at least partially absorbs the primary radiation and converts same into a secondary radiation of a longer wavelength by means of photoluminescence. The conversion shells (4) which are applied to adjacent semiconductor columns (2), only incompletely fill an intermediate space between the semiconductor columns (2).Type: GrantFiled: December 3, 2015Date of Patent: November 20, 2018Assignee: OSRAM Opto Semiconductors GmbHInventors: Dominik Scholz, Martin Mandl, Ion Stoll, Martin Strassburg, Barbara Huckenbeck
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Publication number: 20180331251Abstract: An optoelectronic semiconductor component and a method for producing an optoelectronic semiconductor component are disclosed. In an embodiment, a component includes a semiconductor layer sequence including a first main side, a first layer, an active layer, a second layer and a second main side, a first contact element arranged on the second main side filling a recess in the semiconductor layer sequence, wherein the recess extends from the second main side through the second layer and the active layer and opens out into the first layer and a second contact element arranged on the second main side, the second contact element being arranged laterally next to the recess in a plan view of the second main side, wherein the first contact element comprises a first transparent intermediate layer, a metallic first mirror layer and a metallic injection element.Type: ApplicationFiled: November 9, 2016Publication date: November 15, 2018Inventors: Dominik Scholz, Alexander F. Pfeuffer
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Publication number: 20180309027Abstract: A method for producing a semiconductor chip and a semiconductor chip are disclosed. In an embodiment, the method includes providing a semiconductor layer sequence having a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer is formed as a p-conducting semiconductor region and the second semiconductor layer is formed as an n-conducting semiconductor region, or vice versa, forming at least one recess in the semiconductor layer sequence so that side surfaces of the first and second semiconductor layers are exposed, wherein the recess is multiple times wider than deep and applying an auxiliary layer for electrically contacting the second semiconductor layer, wherein the auxiliary layer at the side surfaces exposed.Type: ApplicationFiled: September 29, 2016Publication date: October 25, 2018Inventors: Alexander F. Pfeuffer, Dominik Scholz
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Publication number: 20180294378Abstract: A method is specified for producing an optoelectronic semiconductor component, comprising the following steps: A) providing a structured semiconductor layer sequence (21, 22, 23) having—a first semiconductor layer (21) with a base region (21c), at least one well (211), and a first cover region (21a) in the region of the well (211) facing away from the base surface (21c),—an active layer (23), and—a second semiconductor layer (22) on a side of the active layer (23) facing away from the first semiconductor layer (21), wherein—the active layer (23) and the second semiconductor layer (22) are structured jointly in a plurality of regions (221, 231) and each region (221, 231) forms, together with the first semiconductor layer (21), an emission region (3), B) simultaneous application of a first contact layer (41) on the first cover surface (21a) and a second contact layer (42) on a second cover surface (3a) of the emission regions (3) facing away from the first semiconductor layer (21) in such a way that—the first cType: ApplicationFiled: June 12, 2018Publication date: October 11, 2018Inventors: Isabel OTTO, Alexander F. PFEUFFER, Dominik SCHOLZ
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Publication number: 20180254378Abstract: A method for fabricating an optoelectronic semiconductor component is disclosed. A semiconductor chip is produced by singularizing a wafer. The semiconductor chip comprises a substrate and a semiconductor layer sequence with an active layer applied to a main side of the substrate. The semiconductor layer sequence has an active region for emission or absorption of radiation and a sacrificial region arranged next to the active region. The sacrificial region in the finished semiconductor component is not intended to emit or absorb radiation. A trench, introduced into the semiconductor layer sequence, penetrates the active layer and separates the active region from the sacrificial region. The semiconductor chip with the semiconductor layer sequence is applied on a carrier. The substrate is detached from the active region of the semiconductor layer sequence. In the sacrificial region, the semiconductor layer sequence remains mechanically connected to the substrate.Type: ApplicationFiled: October 4, 2016Publication date: September 6, 2018Applicant: OSRAM Opto Semiconductors GmbHInventor: Dominik Scholz
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Patent number: 10026868Abstract: A method is specified for producing an optoelectronic semiconductor component, comprising the following steps: A) providing a structured semiconductor layer sequence (21, 22, 23) having —a first semiconductor layer (21) with a base region (21c), at least one well (211), and a first cover region (21a) in the region of the well (211) facing away from the base surface (21c), —an active layer (23), and —a second semiconductor layer (22) on a side of the active layer (23) facing away from the first semiconductor layer (21), wherein —the active layer (23) and the second semiconductor layer (22) are structured jointly in a plurality of regions (221, 231) and each region (221, 231) forms, together with the first semiconductor layer (21), an emission region (3), B) simultaneous application of a first contact layer (41) on the first cover surface (21a) and a second contact layer (42) on a second cover surface (3a) of the emission regions (3) facing away from the first semiconductor layer (21) in such a way that —the fiType: GrantFiled: September 2, 2015Date of Patent: July 17, 2018Assignee: OSRAM Opto Semiconductors GmbHInventors: Isabel Otto, Alexander F. Pfeuffer, Dominik Scholz
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Publication number: 20180166499Abstract: A display device having a plurality of pixels that can be operated separately from one another is disclosed. In an embodiment the display includes a semiconductor layer sequence and a first contact structure for contacting a first semiconductor layer and a second contact structure for contacting a second semiconductor layer, wherein the first contact structure has first contacts configured to be operated separately from one another, each first contact extending laterally and uninterrupted along the first semiconductor layer and each first contact delimits a pixel in a lateral manner with its contour, wherein the semiconductor layer sequence and the first contact structure have at least one recess laterally bordering a respective pixel, which recess extends through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, and wherein the second contact structure has second contacts extending through the at least one recess.Type: ApplicationFiled: May 11, 2016Publication date: June 14, 2018Inventors: Alexander F. Pfeuffer, Dominik Scholz
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Patent number: 9978510Abstract: A planar transmitter having a vertical extent and a horizontal extent, having a layer structure with a plurality of electrical circuits, wherein a first electrical circuit and a second electrical circuit are electrically conductively disconnected from one another. The transmitter also has at least one magnetic core which at least partially surrounds the layer structure and acts at least on the first electrical circuit and on the second electrical circuit, wherein the first electrical circuit and the second electrical circuit lie substantially in one plane and form one layer of the layer structure. Provision is further made for at least the first electrical circuit or the second electrical circuit to be subdivided into a plurality of electrical circuits which are electrically conductively disconnected from one another.Type: GrantFiled: August 9, 2013Date of Patent: May 22, 2018Assignee: Phoenix Contact GmbH & Co. KGInventor: Peter-Dominik Scholz
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Patent number: 9953761Abstract: The invention relates to an arrangement and a method for contactless energy transmission by means of induction. There are a plurality of coils arranged in a matrix, the coils having at least one conductor that surrounds a central axis of the coil at least once in one turn. The central axis stands vertically on the surface surrounded by the conductor in the geometric center of area of the surrounded surface. The coils are arranged adjacent to one another in a planar unit that extends in a first dimension, in a second dimension, and in a third dimension. The extension of the planar unit in the first dimension and in the second dimension is significantly greater than in the third dimension. The central axis of each coil stands at least locally at least nearly perpendicular to the surface spanned by the first dimension and the second dimension. The coils are also arranged in a regular manner within the planar unit in rows and/or columns such that each coil has at least two or three immediately adjacent coils.Type: GrantFiled: May 3, 2012Date of Patent: April 24, 2018Assignee: Phoenix Contact GmbH & Co. KGInventors: Peter-Dominik Scholz, Artjom Galliardt
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Publication number: 20180069147Abstract: Disclosed is a method for producing a plurality of semiconductor chips (10). A composite (1), which comprises a carrier (4) and a semiconductor layer sequence (2, 3), is provided. Separating trenches (17) are formed in the semiconductor layer sequence (2, 3) along an isolation pattern (16). A filling layer (11) limiting the semiconductor layer sequence (2, 3) toward the separating trenches (17) is applied to a side of the semiconductor layer sequence (2, 3) facing away from the carrier (4). Furthermore, a metal layer (10) adjacent to the filling layer (11) is applied in the separating trenches (17). The semiconductor chips (20) are isolated by removing the metal layer (10) adjacent to the filling layer (11) in the separating trenches (17). Each isolated semiconductor chip (20) has one part of the semiconductor layer sequence (2, 3), and of the filling layer (11). Also disclosed is a semiconductor chip (10).Type: ApplicationFiled: February 15, 2016Publication date: March 8, 2018Inventors: Lutz HOEPPEL, Alexander F. PFEUFFER, Dominik SCHOLZ, Isabel OTTO, Norwin VON MALM, Stefan ILLEK
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Patent number: 9847467Abstract: A method of producing a contact element for an optoelectronic component includes providing an auxiliary carrier with a sacrificial layer arranged on a top side of the auxiliary carrier; providing a carrier structure having a top side and a rear side situated opposite the top side, wherein an insulation layer is arranged at the rear side of the carrier structure; connecting the sacrificial layer to the insulation layer by an electrically conductive connection layer; creating at least one blind hole extending from the top side of the carrier structure as far as the insulation layer; opening the insulation layer in a region of the at least one blind hole; arranging an electrically conductive material in the at least one blind hole; detaching the auxiliary carrier by separating the sacrificial layer; and patterning the electrically conductive connection layer.Type: GrantFiled: October 27, 2014Date of Patent: December 19, 2017Assignee: OSRAM Opto Semiconductors GmbHInventors: Dominik Scholz, Norwin von Malm, Stefan Illek
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Publication number: 20170358719Abstract: In at least one embodiment, the semiconductor layering sequence (1) is designed for generating light and comprises semiconductor columns (2). The semiconductor columns (2) have a respective core (21) made of a semiconductor material of a first conductivity type, and a core shell (23) surrounding the core (21) made of a semiconductor material of a second conductivity type. There is an active zone (22) between the core (21) and the core shell (23) for generating a primary radiation by means of electroluminescence. A respective conversion shell (4) is placed onto the semiconductor columns (2), which conversion shell at least partially interlockingly surrounds the corresponding core shell (23), and which at least partially absorbs the primary radiation and converts same into a secondary radiation of a longer wavelength by means of photoluminescence. The conversion shells (4) which are applied to adjacent semiconductor columns (2), only incompletely fill an intermediate space between the semiconductor columns (2).Type: ApplicationFiled: December 3, 2015Publication date: December 14, 2017Inventors: Dominik SCHOLZ, Martin MANDL, Ion STOLL, Martin STRASSBURG, Barbara HUCKENBECK
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Publication number: 20170310079Abstract: A laser component has a housing, which includes a carrier having a cavity with a bottom surface and a sidewall, wherein the cavity widens starting from the bottom surface, the side wall is inclined relative to the bottom surface by an angle different from 45°, a laser chip, an emission direction of which is oriented parallel to the bottom surface, is arranged on the bottom surface in the cavity, a reflective element is arranged in the cavity and bears on an edge between the bottom surface and the side wall, a reflective surface of the reflective element defines an angle with the bottom surface of the cavity, and the emission direction defines an angle of 45° with the reflective surface of the reflective element.Type: ApplicationFiled: October 7, 2015Publication date: October 26, 2017Inventor: Dominik Scholz
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Patent number: 9780569Abstract: A device for electrical energy supply and/or data supply of end devices using inductive coupling includes an oblong holding device and a number of adjacently arranged transmitting coils that generate magnetic field lines along the holding device. Structurally narrow end devices have flat receiving coils whose plane is oriented perpendicular to the longitudinal extension of the holding device.Type: GrantFiled: January 11, 2013Date of Patent: October 3, 2017Assignee: PHOENIX CONTACT GmbH & CO. KGInventors: Peter-Dominik Scholz, Johannes Kalhoff
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Patent number: 9768836Abstract: A device for supplying electrical energy and/or supplying data to an electronic module, comprising a transmitting coil that has a coil axis and at least two energy receiving parts that are arranged side by side and have receiving coils, the coil axes of which run in the same direction or run parallel to the transmitting coil axis. Each of the coils is integrated in resonance circuits. The energy receiving parts supply electronics and, together with the same, are galvanically separated from one another by an insulating area of separation which is bridged by a data signal coupling line.Type: GrantFiled: January 11, 2013Date of Patent: September 19, 2017Assignee: PHOENIX CONTACT GmbH & CO. KGInventor: Peter-Dominik Scholz
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Patent number: 9698316Abstract: A method for producing a laterally structured phosphor layer and an optoelectronic component comprising such a phosphor layer are disclosed. In an embodiment the method includes providing a carrier having a first electrically conductive layer at a carrier top side, applying an insulation layer to the first electrically conductive layer and a second electrically conductive layer to the insulation layer, etching the second electrically conductive layer and the insulation layer, wherein the first electrically conductive layer is maintained as a continuous layer. The method further includes applying a voltage to the first electrically conductive layer and electrophoretically coating the first electrically conductive layer with a first material, and applying a voltage to the second electrically conductive layer and electrophoretically coating the second electrically conductive layer with a second material.Type: GrantFiled: January 20, 2015Date of Patent: July 4, 2017Assignee: OSRAM Opto Semiconductors GmbHInventors: Britta Göötz, Ion Stoll, Alexander F. Pfeuffer, Dominik Scholz, Isabel Otto
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Publication number: 20170186911Abstract: A method is specified for producing an optoelectronic semiconductor component, comprising the following steps: A) providing a structured semiconductor layer sequence (21, 22, 23) having —a first semiconductor layer (21) with a base region (21c), at least one well (211), and a first cover region (21a) in the region of the well (211) facing away from the base surface (21c), —an active layer (23), and —a second semiconductor layer (22) on a side of the active layer (23) facing away from the first semiconductor layer (21), wherein —the active layer (23) and the second semiconductor layer (22) are structured jointly in a plurality of regions (221, 231) and each region (221, 231) forms, together with the first semiconductor layer (21), an emission region (3), B) simultaneous application of a first contact layer (41) on the first cover surface (21a) and a second contact layer (42) on a second cover surface (3a) of the emission regions (3) facing away from the first semiconductor layer (21) in such a way that —the fiType: ApplicationFiled: September 2, 2015Publication date: June 29, 2017Inventors: Isabel OTTO, Alexander F. PFEUFFER, Dominik SCHOLZ