Abstract: An electronic packaging structure, and a method of making this structure, are disclosed. The electronic packaging structure comprises a full panel, circuitized flexible film semiconductor chip carrier mounted on a circuitized substrate such as a printed circuit board. A plurality of semiconductor chips are mounted on the carrier in a selected pattern, and the carrier, with the chips, is mounted on a matching pattern of bonding sites on the circuitized substrate. Preferably, the circuitized flexible film semiconductor chip carrier is manufactured on a support structure used to facilitate handling of the circuitized flexible film and to facilitate heat transfer from the semiconductor chips mounted on a carrier to a heat sink which is part of the circuitized substrate. Also, the semiconductor chip mounted on the flexible film chip carrier may be tested, and burned in, while on the support structure before the chip carrier, with the chips, is mounted on the circuitized substrate.

Abstract: Copper is plated onto a substrate from an electroless plating bath having a mix potential relative to a saturated calomel electrode of about minus 630 to about minus 675 millivolts at a temperature of about 73.degree. C. The mix potential of the bath is monitored and adjusted during the plating to maintain it at about minus 630 to about minus 675 millivolts with respect to a calomel electrode at a temperature of about 73.degree. C. The number of of plating void defects is thereby reduced.

Abstract: A method for plating a metal from an electroless plating bath onto a substrate is provided which includes providing a source of an electroless plating bath at a non-plating temperature in a master mixing tank; transferring at least a portion of the plating bath to at least one plating cell, changing the bath temperature to a plating temperature, and contacting the substrate to be plated with the bath at a plating temperature.