Abstract: A method and a system thereof for producing a digital holographic screen based on multi-hogel printing are proposed. The system includes a light source unit including lasers, a dichroic mirror for RGB three color matching, mirrors, a beam splitter, and an optical shutter, an object beam unit including a spatial filter, a lens, and a mirror, a reference beam unit including a spatial filter, a lens, and a mirror, a diffuser fixing unit including a diffuser holder and a diffuser positioned between the object beam unit and a recording material and configured to scatter and diffuse the object beam, a photomask movement unit including a photomask holder, an XY-translation stage, and a photomask positioned between the reference beam unit and the recording medium and on which a grid-shaped on/off binary pattern is printed, and a controller configured to control the optical shutter and the XY-translation stage.

Abstract: An image monitoring system including a surveillance camera is provided. The surveillance camera includes: an image analyzer configured to analyze an input image; a sound source analyzer configured to analyze a sound source in the image or a sound source that is input separately; and a determiner configured to determine whether an abnormal image and an abnormal sound source exist, and when the abnormal image and the abnormal sound source are obtained, according to a result of the image analysis and the sound source analysis, to generate metadata and alarm information based on a result of the determination, wherein the abnormal image and the abnormal sound source are predefined.

Abstract: A memory device includes a buffer memory configured to receive commands from a memory controller via first to Nth channels, wherein N denotes an integer which is equal to or greater than ‘2’; and first to Nth core memories each connected to the buffer memory via one of the first to Nth channels. The buffer memory may deconcentrate refresh commands corresponding to the first to Nth core memories, based on a number of commands input during a specific time.

Abstract: A semiconductor memory device includes a memory cell array including a plurality of memory cell rows; and a data control circuit configured to, sequentially read a first unit of data from N memory cell rows of the plurality of memory cell rows, generate merged test results by comparing bits read from the first units of the N memory cell rows, and output the merged test results, during the test mode of the semiconductor memory device. Therefore, test time for testing the semiconductor memory device may be greatly reduced because a test device may determine pass/fail of the data of the unit of repair unit on one read operation.

Abstract: A method of controlling a surveillance system having a visible imaging camera for obtaining a visible image of an object and a display apparatus, includes providing a color visible image, from the visible imaging camera, to the display apparatus and generating a color background image by extracting a background area from the color visible image when a current ambient illuminance belongs to a daytime illuminance range, and replacing a background area of a black and white visible image, from the visible imaging camera, with the color background image and providing a mixed image as a result of the replacement to the display apparatus when the current illuminance belongs to the nighttime illuminance range.

Abstract: Disclosed is a depth-priority integral imaging display method using a nonuniform dynamic mask array which makes it possible to enhance the resolutions in both horizontal and vertical directions in such a way to change a division boundary of a mask pattern and use a two-times time multiplexing. It is possible to enjoy the images of clear resolutions even in the product of 60 Hz, and the afterimages at the division boundary may be eliminated by changing the dividing direction of the mask, so the images with clearer resolutions can be displayed.

Abstract: A memory device includes a buffer memory configured to receive commands from a memory controller via first to Nth channels, wherein N denotes an integer which is equal to or greater than ‘2’; and first to Nth core memories each connected to the buffer memory via one of the first to Nth channels. The buffer memory may deconcentrate refresh commands corresponding to the first to Nth core memories, based on a number of commands input during a specific time.

Abstract: A memory device includes a buffer memory configured to receive commands from a memory controller via first to Nth channels, wherein N denotes an integer which is equal to or greater than ‘2’; and first to Nth core memories each connected to the buffer memory via one of the first to Nth channels. The buffer memory may deconcentrate refresh commands corresponding to the first to Nth core memories, based on a number of commands input during a specific time.

Abstract: A memory device includes a buffer memory configured to receive commands from a memory controller via first to Nth channels, wherein N denotes an integer which is equal to or greater than ‘2’; and first to Nth core memories each connected to the buffer memory via one of the first to Nth channels. The buffer memory may deconcentrate refresh commands corresponding to the first to Nth core memories, based on a number of commands input during a specific time.

Abstract: Disclosed is a depth-priority integral imaging display method using a nonuniform dynamic mask array which makes it possible to enhance the resolutions in both horizontal and vertical directions in such a way to change a division boundary of a mask pattern and use a two-times time multiplexing. It is possible to enjoy the images of clear resolutions even in the product of 60 Hz, and the afterimages at the division boundary may be eliminated by changing the dividing direction of the mask, so the images with clearer resolutions can be displayed.

Abstract: A method for displaying three-dimensional integral images using a mask and a time division multiplexing which is configured in such a way that a three-dimensional image is displaced in a space as an element image obtained from a three-dimensional object is passed through a lenslet and a mask, the mask consisting of a blocking region through which an element image does not pass and a transmission region through which an element image passes, for thereby displaying three-dimensional images. The present invention is advantageous to play back a three-dimensional image the resolutions of which are enhanced in a depth-based integral imaging method using a time division display of an element image and a masked image.

Abstract: A semiconductor memory device includes a memory cell array including a plurality of memory cell rows; and a data control circuit configured to, sequentially read a first unit of data from N memory cell rows of the plurality of memory cell rows, generate merged test results by comparing bits read from the first units of the N memory cell rows, and output the merged test results, during the test mode of the semiconductor memory device. Therefore, test time for testing the semiconductor memory device may be greatly reduced because a test device may determine pass/fail of the data of the unit of repair unit on one read operation.

Abstract: A semiconductor device may comprise a first bit line, a second bit line, a memory cell connected to the first bit line, a bit line sense amplifier circuit and a control circuit. The bit line sense amplifier circuit may be coupled to the memory cell. The bit line sense amplifier circuit may include a first inverter having an input node coupled to the first bit line and an output node coupled to the second bit line, and a second inverter having an input node coupled to the second bit line and an output node coupled to the first bit line. The control circuit may be configured to activate the first inverter without activating the second inverter during a first time period and to activate the first inverter and the second inverter at the same time during a second time period after the first time period.

Abstract: An image monitoring system including a surveillance camera is provided. The surveillance camera includes: an image analyzer configured to analyze an input image; a sound source analyzer configured to analyze a sound source in the image or a sound source that is input separately; and a determiner configured to determine whether an abnormal image and an abnormal sound source exist, and when the abnormal image and the abnormal sound source are obtained, according to a result of the image analysis and the sound source analysis, to generate metadata and alarm information based on a result of the determination, wherein the abnormal image and the abnormal sound source are predefined.

Abstract: A semiconductor device may comprise a first bit line, a second bit line, a memory cell connected to the first bit line, a bit line sense amplifier circuit and a control circuit. The bit line sense amplifier circuit may be coupled to the memory cell. The bit line sense amplifier circuit may include a first inverter having an input node coupled to the first bit line and an output node coupled to the second bit line, and a second inverter having an input node coupled to the second bit line and an output node coupled to the first bit line. The control circuit may be configured to activate the first inverter without activating the second inverter during a first time period and to activate the first inverter and the second inverter at the same time during a second time period after the first time period.

Abstract: A method for displaying three-dimensional integral images using a mask and a time division multiplexing which is configured in such a way that a three-dimensional image is displaced in a space as an element image obtained from a three-dimensional object is passed through a lenslet and a mask, the mask consisting of a blocking region through which an element image does not pass and a transmission region through which an element image passes, for thereby displaying three-dimensional images. The present invention is advantageous to play back a three-dimensional image the resolutions of which are enhanced in a depth-based integral imaging method using a time division display of an element image and a masked image.

Abstract: A method of controlling a surveillance system having a visible imaging camera for obtaining a visible image of an object and a display apparatus, includes providing a color visible image, from the visible imaging camera, to the display apparatus and generating a color background image by extracting a background area from the color visible image when a current ambient illuminance belongs to a daytime illuminance range, and replacing a background area of a black and white visible image, from the visible imaging camera, with the color background image and providing a mixed image as a result of the replacement to the display apparatus when the current illuminance belongs to the nighttime illuminance range.

Abstract: A three-dimensional image display method is disclosed. The three-dimensional image display method in accordance with an embodiment of the present invention includes: displaying an object image; displaying a background image by using a three-dimensional image display method; and disposing the object image at a close distance and the background image at a far distance such that the object image and the background image overlap inside a same viewing angle. By using images having a different sense of depth, a high-resolution image can be displayed while providing a sense of reality.

Abstract: A semiconductor device includes a bit line connected to a plurality of memory cells in a memory block and a sense amplifier having a first node connected to the bit line and a second node, which is not connected to any bit line. The second node has a capacitive load less than that of the bit line. The sense amplifier amplifies a first data using a voltage difference between the first node and the second node caused by a charge sharing operation, and a second data using a capacitive mismatch between the first node and the second node.

Abstract: A semiconductor memory device includes a first memory block, a second memory block, and a signal controller. The first memory block is configured to generate a first blocking signal, a second blocking signal, and a first enable signal in response to a row address, and to block and enable wordlines of the memory block in response to the first blocking signal and the first enable signal, respectively. The second memory block is configured to generate a third blocking signal, a fourth blocking signal, and a second enable signal in response to the row address, and to block and enable wordlines of the second memory block in response to the third blocking signal and the second enable signal, respectively. The signal controller is connected between the first memory block and the second memory block and is configured to enable the third blocking signal when the second blocking signal is enabled, and to enable the first blocking signal when the fourth blocking signal is enabled.