Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: In one example, a semiconductor device includes a first substrate with a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a first substrate conductive structure. An electronic component is coupled to the first substrate top side and coupled to the first substrate conductive structure. A support includes a support wall having a first ledge coupled to the first substrate top side, a first riser coupled to the first substrate lateral side, and a second ledge extending from the first riser away from the first substrate lateral side. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device includes a first substrate with a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a first substrate conductive structure. An electronic component is coupled to the first substrate top side and coupled to the first substrate conductive structure. A support includes a support wall having a first ledge coupled to the first substrate top side, a first riser coupled to the first substrate lateral side, and a second ledge extending from the first riser away from the first substrate lateral side. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device includes a substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. An electronic component includes an upper side, a lower side opposite to the upper side and coupled to the substrate inner side; a lateral side connecting the upper side to the lower side; and a conductor on the upper side. A cover structure includes sidewalls coupled to the substrate inner side and an upper wall coupled to the sidewalls and comprising an inner side spaced apart from the conductor. A thermal interface material (TIM) contacts and is interposed between the conductor and the inner side of the upper wall. The TIM covers the conductor and the lateral side of the electronic component. Other examples and related methods are also disclosed herein.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: In one example, an electronic device includes a substrate with a substrate first side; a substrate second side opposite to the substrate first side, a substrate lateral side connecting the substrate first side to the substrate second side, a dielectric structure, and a conductive structure. A substrate dock includes a substrate dock base at the substrate first side and a first substrate dock sidewall extending upward from the substrate dock base. The substrate dock base and the first substrate dock sidewall define a substrate dock cavity. A cover structure includes a cover sidewall with a cover sidewall lower side. An interface material couples the cover sidewall to the substrate dock. An electronic component is coupled to the conductive structure. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: Disclosed is a system and method for stormwater utility management that aids stormwater utilities in establishing fees, abatements, and tradeable stormwater credits using publicly available parcel database information. A stormwater support services computer in communication with publicly available data stores of parcel information rapidly assesses and generates a per-parcel stormwater utility fee based on estimated size of impervious surfaces on a parcel. Through use of publicly available parcel information to generate an estimated size of impervious surfaces on a parcel, a stormwater utility fee based on level of service is implemented.

Abstract: In one example, a semiconductor device includes a first substrate with a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a first substrate conductive structure. An electronic component is coupled to the first substrate top side and coupled to the first substrate conductive structure. A support includes a support wall having a first ledge coupled to the first substrate top side, a first riser coupled to the first substrate lateral side, and a second ledge extending from the first riser away from the first substrate lateral side. Other examples and related methods are also disclosed herein.

Abstract: Disclosed is a system and method for stormwater utility management that aids stormwater utilities in establishing fees, abatements, and tradeable stormwater credits using publicly available parcel database information. A stormwater support services computer in communication with publicly available data stores of parcel information rapidly assesses and generates a per-parcel stormwater utility fee based on estimated size of impervious surfaces on a parcel. Through use of publicly available parcel information to generate an estimated size of impervious surfaces on a parcel, a stormwater utility fee based on level of service is implemented.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: Disclosed is a system and method for stormwater utility management that aids stormwater utilities in establishing fees, abatements, and tradeable stormwater credits using publicly available parcel database information. A stormwater support services computer in communication with publicly available data stores of parcel information rapidly assesses and generates a per-parcel stormwater utility fee based on estimated size of impervious surfaces on a parcel. Through use of publicly available parcel information to generate an estimated size of impervious surfaces on a parcel, a stormwater utility fee based on level of service is implemented.

Abstract: Sample loading device and electrostatic levitation apparatus. The electrostatic levitation apparatus includes a sample storage part including a rod-shaped sample standby part having an external diameter of a first diameter and a rod-shaped sample loading part having an external diameter of a second diameter and a sample cover part covering the sample standby part. The sample storage part has a loading bar inserting hole formed in its center. The loading bar inserting hole is formed through the sample standby part and is formed successively through a portion of the sample loading part. The sample standby part has sample storage vertical through-holes. The sample loading part has a single sample transfer vertical through-hole. The sample transfer vertical through-hole is formed on a surface where the sample storage vertical through-hole is viewed, penetrates the sample loading part, and is connected to the loading bar inserting hole.

Abstract: A semiconductor package including a premold which is used to define support structure for a semiconductor die which is mounted to the premold by a layer of suitable adhesive. Embedded within the premold are lands which each include oppose upper and lower surfaces exposed in respective ones of upper and lower surfaces define by the premold. The semiconductor die, which is attached to the upper surface of the premold by the adhesive layer, is electrically connected to the exposed upper surfaces of the lands through the use of conductive wires. The semiconductor die, conductive wires, and the upper surface of the premold are covered or encapsulated by a package body. The package body does not cover any portion of the lower surface of the premold, thus allowing the exposed lower surfaces of the lands to be placed into electrical connection or communication with an underlying substrate such as a PCB or motherboard.

Abstract: Sample loading device and electrostatic levitation apparatus. The electrostatic levitation apparatus includes a sample storage part including a rod-shaped sample standby part having an external diameter of a first diameter and a rod-shaped sample loading part having an external diameter of a second diameter and a sample cover part covering the sample standby part. The sample storage part has a loading bar inserting hole formed in its center. The loading bar inserting hole is formed through the sample standby part and is formed successively through a portion of the sample loading part. The sample standby part has sample storage vertical through-holes. The sample loading part has a single sample transfer vertical through-hole. The sample transfer vertical through-hole is formed on a surface where the sample storage vertical through-hole is viewed, penetrates the sample loading part, and is connected to the loading bar inserting hole.

Abstract: A levitation apparatus and a levitation method are provided. The levitation apparatus includes a top electrode and a bottom electrode disposed to be spaced apart from each other, a main power source adapted to apply a voltage to the top electrode or the bottom electrode such that a charged object levitates against gravity by using an electrostatic force generated by the voltage, a laser to heat the charged object, and spherical mirrors to re-reflect reflected light reflected from the charged object to the charged object. The reflected light may be generated when output light of the laser passing through a through-hole formed in a surface central region of each of the spherical mirrors is reflected by the charged object.