Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

Abstract: There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.

Abstract: A variable resistance memory device may include: a first electrode layer; a selection device layer on the first electrode layer, the selection device layer including a chalcogenide switching material consisting essentially of germanium (Ge), selenium (Se), and antimony (Sb), wherein a content of the Ge is less than a content of the Se based on an atomic weight; a second electrode layer on the selection device layer; a variable resistance layer on the second electrode layer, the variable resistance layer including a chalcogenide material; and a third electrode layer on the variable resistance layer.

Abstract: A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below, [GeXSiY(AsaTe1-a)Z](1-U)[N]U??(1) (where 0.05?X?0.1, 0.15?Y?0.25, 0.7?Z?0.8, X+Y+Z=1, 0.45?a?0.6, and 0.08?U?0.2).

Abstract: A variable resistance memory device including a selection pattern; an intermediate electrode contacting a first surface of the selection pattern; a variable resistance pattern on an opposite side of the intermediate electrode relative to the selection pattern; and a first electrode contacting a second surface of the selection pattern and including a n-type semiconductor material, the second surface of the selection pattern being opposite the first surface thereof.

Abstract: A variable resistance memory device includes a first electrode layer and a selection device layer on the first electrode layer. The selection device layer includes a first chalcogenide material obtained by doping at least one of boron or carbon into a chalcogenide switching material. A second electrode layer is on the selection device layer. A variable resistance layer is on the second electrode layer. The variable resistance layer includes a second chalcogenide material including at least one different element from the chalcogenide switching material. A third electrode layer is on the variable resistance layer.

Abstract: A composition containing wall teichoic acid-attached peptidoglycan (WTA-PGN) as an active ingredient, a method for preventing or treating Staphylococcus aureus infectious diseases using the composition, and a method for preparing a soluble WTA-PGN which can be used as an active ingredient in the composition are provided. The composition of the present invention can be effectively used for preventing or treating Staphylococcus aureus infectious diseases by opsonophagocytosis due to antigen-antibody reaction and neutrophil-mediated phagocytosis due to T cell activation at the early stage of infection.

Abstract: A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p), wherein an atomic concentration of the impurities X is in a range of 0<p?0.2, an atomic concentration of Ge is in a range of 0.05?a<0.19, and an atomic concentration of Te is in a range of 0.42?b?0.56.

Abstract: A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p), wherein an atomic concentration of the impurities X is in a range of 0<p?0.2, an atomic concentration of Ge is in a range of 0.05?a<0.19, and an atomic concentration of Te is in a range of 0.42?b?0.56.

Abstract: A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p), wherein an atomic concentration of the impurities X is in a range of 0<p?0.2, an atomic concentration of Ge is in a range of 0.05?a<0.19, and an atomic concentration of Te is in a range of 0.42?b?0.56.

Abstract: The present invention relates to a novel MDCK-derived cell line capable of being suspension-cultured in a protein-free medium and a method for proliferating a virus using the MDCK-derived cell line to produce a vaccine. The novel MDCK-derived cell line exhibits high and uniform productivity for various viruses, while causing less viral antigenic variations with low tumorigenicity, and thus can be useful in producing viruses used for vaccines.

Abstract: In a method of manufacturing a phase change memory device, an insulating interlayer having a through opening is formed on a substrate, at least one conformal phase change material layer pattern is formed along the sides of the opening, and a plug-like phase change material pattern having a composition different from that of each conformal phase change material layer pattern is formed on the at least one conformal phase change material layer pattern as occupying a remaining portion of the opening. Energy is applied to the phase change material layer patterns to form a mixed phase change material layer pattern including elements from the conformal and plug-like phase change material layer patterns.

Abstract: A physical vapor deposition (PVD) apparatus for forming a phase-changeable layer includes a process chamber including a loading chamber configured to load a substrate, and a depositing chamber configured to deposit ion particles of a phase-changeable material onto the substrate; a target member on an upper portion of the depositing chamber and configured to provide the ion particles of the phase-changeable material which react with process gases in a plasma state; a plasma generator configured to generate a process gas plasma from the process gases; a chuck on a lower portion of the depositing chamber and holding the substrate, the chuck including a heater configured to heat the substrate, and at least one electrode configured to guide the ion particles of the phase-changeable material to the substrate; and a supplementary heater in the process chamber and configured to transfer radiant heat around the substrate.

Abstract: In a method of manufacturing a phase change memory device, an insulating interlayer having a through opening is formed on a substrate, at least one conformal phase change material layer pattern is formed along the sides of the opening, and a plug-like phase change material pattern having a composition different from that of each conformal phase change material layer pattern is formed on the at least one conformal phase change material layer pattern as occupying a remaining portion of the opening. Energy is applied to the phase change material layer patterns to form a mixed phase change material layer pattern including elements from the conformal and plug-like phase change material layer patterns.

Abstract: The present invention relates to a vaccine composition for preventing staphylococcus aureus infection containing, as an active ingredient, a ribitol-phosphate which has been modified only by a ?-configuration in N-Acetylglucosamine (GlcNAc), a repeating unit of the ribitol-phosphate, or a wall teichoic acid (WTA) containing the repeating unit. The composition according to the present invention contains a coupling motif (an epitope) for an anti-WTA antibody, and thus can be effectively used as a vaccine composition or to prevent staphylococcus aureus infection by generating anti-WTA antibody.

Abstract: Methods of manufacturing non-volatile memory devices may include separating first phase-change material groups and second phase-change material groups, which have different sizes, from a target including phase-change materials and faulting a phase-change material layer on an object by using the first phase-change material groups and the second phase-change material groups.

Abstract: Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.

Abstract: A nonvolatile memory cell includes a substrate and a phase changeable pattern configured to retain a state of the memory cell, on the substrate. An electrically insulating layer is provided, which contains a first electrode therein in contact with the phase changeable pattern. The first electrode has at least one of an L-shape when viewed in cross section and an arcuate shape when viewed from a plan perspective. A lower portion of the first electrode may be ring-shaped when viewed from the plan perspective. The lower portion of the first electrode may also have a U-shaped cross-section. An upper portion of the first electrode may also have an arcuate shape that spans more than 180° of a circular arc.

Abstract: A non-volatile memory device includes a lower electrode, a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. The phase-change material layer includes a phase-change material including a composition represented by the formula (I)A(IIXIIIYIVZ)(1-A), where I is at least one of As and Se, II is at least one of Ge, Si and Sn, III is at least one of Sb and Bi, and IV is at least one of Te and Se, and where 0.001?A?0.3, 0.001?X?0.3, 0.001?Y?0.8, 0.1?Z?0.8, and X+Y+Z=1.