Patents by Inventor Dong-Ho Han

Dong-Ho Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080131997
    Abstract: Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure.
    Type: Application
    Filed: January 17, 2008
    Publication date: June 5, 2008
    Inventors: Joong-Ho Kim, Dong-Ho Han, Hyunjun Kim, Jiangqi He
  • Patent number: 7352557
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a plurality of vertically-oriented plates separated by dielectric layers, wherein the vertically-oriented plates include a plurality of terminals coupled to a bottom side of the plates.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: April 1, 2008
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Jiangqi He, Joong-Ho Kim, Dong-Ho Han
  • Patent number: 7345359
    Abstract: Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: March 18, 2008
    Assignee: Intel Corporation
    Inventors: Joong-Ho Kim, Dong-Ho Han, Hyunjun Kim, Jiangqi He
  • Publication number: 20070188262
    Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 16, 2007
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jiangqi He
  • Publication number: 20070145543
    Abstract: A method including modifying a characteristic impedance along a length of a plating bar of a substrate package. An apparatus including a package substrate including a plurality of transmission lines therethrough, a portion of the plurality of transmission lines each including a plating bar coupled thereto, wherein the plating bar comprises portions having different characteristic impedance along its length. A system including a computing device including a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate including a plurality of transmission lines therethrough, a portion of the plurality of transmission lines each including a plating bar coupled thereto, wherein the plating bar comprises portions having different characteristic impedance along its length.
    Type: Application
    Filed: December 28, 2005
    Publication date: June 28, 2007
    Inventors: Xiang Zeng, Jiangqi He, Dong-Ho Han
  • Patent number: 7218183
    Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: May 15, 2007
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jiangqi He
  • Patent number: 7142073
    Abstract: Transmission line impedance matching is described for matching an impedance discontinuity on a transmission signal trace. The apparatus includes a transmission signal trace and a non-transmission trace. The transmission signal trace has an impedance discontinuity, a first length, and a predetermined first width. The non-transmission trace is disposed near the transmission signal trace at a region corresponding to the impedance discontinuity. The non-transmission trace has a second length that is substantially less than the first length of the transmission signal trace. Additionally, the non-transmission trace is configured to be electromagnetically coupled to the transmission signal trace in the presence of a current on the transmission signal trace to provide a matched impedance on the transmission signal trace.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: November 28, 2006
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jiangqi He
  • Publication number: 20060238257
    Abstract: An apparatus adapted to control transmission power in a mobile station comprises a power amplifier adapted to amplify a radio signal with a gain characteristic corresponding to a computed transmission level, and an automatic gain control unit adapted to generate an automatic gain control signal to control a gain of the power amplifier. The apparatus also comprises a temperature compensating unit adapted to compute a maximum output deviation of the mobile station according to a temperature variation of the power amplifier, the temperature compensating unit compensating the automatic gain control signal using a per temperature compensating value according to the computed deviations. The apparatus also comprises a control unit adapted to control the automatic gain control unit and the temperature compensating unit by sensing the temperature variation of the power amplifier and by detecting an output characteristic of the power amplifier according to the temperature variation.
    Type: Application
    Filed: January 27, 2006
    Publication date: October 26, 2006
    Inventor: Dong-Ho Han
  • Patent number: 7110263
    Abstract: An apparatus comprises a signal layer including a first and second signal trace. The apparatus also comprises a first reference plane including a first slot substantially parallel to the first and second signal traces. Further, the apparatus includes a dielectric layer having at least a portion disposed between the signal layer and the first reference plane.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventors: Jiangqi He, Joong-ho Kim, Hyunjun Kim, Dong-ho Han, Ping Sun
  • Publication number: 20060125574
    Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.
    Type: Application
    Filed: February 10, 2006
    Publication date: June 15, 2006
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jianggi He
  • Publication number: 20050285695
    Abstract: Transmission line impedance matching is described for matching an impedance discontinuity on a transmission signal trace. The apparatus includes a transmission signal trace and a non-transmission trace. The transmission signal trace has an impedance discontinuity, a first length, and a predetermined first width. The non-transmission trace is disposed near the transmission signal trace at a region corresponding to the impedance discontinuity. The non-transmission trace has a second length that is substantially less than the first length of the transmission signal trace. Additionally, the non-transmission trace is configured to be electromagnetically coupled to the transmission signal trace in the presence of a current on the transmission signal trace to provide a matched impedance on the transmission signal trace.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jiangqi He
  • Publication number: 20050201072
    Abstract: An apparatus comprises a signal layer including a first and second signal trace. The apparatus also comprises a first reference plane including a first slot substantially parallel to the first and second signal traces. Further, the apparatus includes a dielectric layer having at least a portion disposed between the signal layer and the first reference plane.
    Type: Application
    Filed: March 9, 2004
    Publication date: September 15, 2005
    Inventors: Jiangqi He, Joong-ho Kim, Hyunjun Kim, Dong-ho Han, Ping Sun
  • Publication number: 20050194669
    Abstract: Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 8, 2005
    Inventors: Joong-Ho Kim, Dong-Ho Han, Hyunjun Kim, Jiangqi He
  • Publication number: 20050164465
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a plurality of vertically-oriented plates separated by dielectric layers, wherein the vertically-oriented plates include a plurality of terminals coupled to a bottom side of the plates.
    Type: Application
    Filed: March 17, 2005
    Publication date: July 28, 2005
    Inventors: Hyunjun Kim, Jiangqi He, Joong-Ho Kim, Dong-Ho Han
  • Publication number: 20050087877
    Abstract: In some embodiments, an apparatus includes a substrate and a pair of signal traces formed on the substrate. The signal traces may be spaced apart from each other. The apparatus may also include a filler material on the substrate and between the signal traces. The filler material may have a dielectric constant that is higher than a dielectric constant of a material of which the substrate is formed.
    Type: Application
    Filed: October 22, 2003
    Publication date: April 28, 2005
    Inventors: Dong-Ho Han, Joong-Ho Kim, Jiangqi He, Hyunjun Kim
  • Patent number: 6885544
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a plurality of vertically-oriented plates separated by dielectric layers, wherein the vertically-oriented plates include a plurality of terminals coupled to a bottom side of the plates.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: April 26, 2005
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Jiangqi He, Joong-Ho Kim, Dong-Ho Han
  • Patent number: 6877998
    Abstract: A socket electrically connects an integrated circuit package and a circuit board. The socket includes a frames having a plurality of electrical connectors mounted to the frame. The plurality of electrical connectors includes at least one pair of power and ground connectors, with power connector including a first broadside portion and the ground connector including a second broadside portion. The first and second broadside portion are disposed in an adjacent, spaced-apart, and substantially parallel relationship.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Jianggi He, Dong-Ho Han, Joong-Ho Kim
  • Publication number: 20050063137
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a plurality of vertically-oriented plates separated by dielectric layers, wherein the vertically-oriented plates include a plurality of terminals coupled to a bottom side of the plates.
    Type: Application
    Filed: September 24, 2003
    Publication date: March 24, 2005
    Inventors: Hyunjun Kim, Jiangqi He, Joong-Ho Kim, Dong-Ho Han