Patents by Inventor Dong Hwang

Dong Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10862478
    Abstract: A semiconductor apparatus may be provided. The semiconductor apparatus may include a first buffer configured to generate a first preliminary clock and a first preliminary clock bar based on an external clock, an external clock bar, and a node voltage code. The semiconductor apparatus may include a node voltage control circuit configured to generate the node voltage code based on a control code.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: December 8, 2020
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Publication number: 20200368757
    Abstract: Disclosed herein is an electrostatic precipitation method using an electrostatic precipitator including a collection module having a collection electrode and a discharge electrode, a housing having an internal partition wall formed therein, an inlet-side passage switching member, and an outlet-side passage switching member. The electrostatic precipitation method includes collecting dust by applying a voltage to the discharge electrode while gas flows, closing some of the flow spaces, divided by the internal partition wall using the passage switching members, and performing dust collection for one of the opened flow spaces by applying a voltage to the discharge electrode therein, and performing washing for at least one of the closed flow spaces by supplying washing water to the collection electrode therein.
    Type: Application
    Filed: April 23, 2020
    Publication date: November 26, 2020
    Inventors: Jin Woon LEE, Sang Rin LEE, Jae Dong HWANG, Sang Chul MOON
  • Publication number: 20200368760
    Abstract: Disclosed herein is a dust collecting tower apparatus that includes a housing having an inlet, into which gas is introduced, and an outlet from which the gas is discharged, and a collection module disposed in the housing and configured to collect particulates with a corona discharge. The collection module includes a plurality of discharge electrodes, to which a voltage is applied, a plurality of collection electrodes disposed between the respective discharge electrodes, where the collection electrodes is grounded, and a first setting beam having a plurality of lower slots into which the discharge electrodes are inserted. The apparatus further includes a washing water feeder configured to spray washing water to the collection module.
    Type: Application
    Filed: April 22, 2020
    Publication date: November 26, 2020
    Inventors: Jin Woon LEE, Sang Rin LEE, Jae Dong HWANG, Sang Chul MOON
  • Publication number: 20200360936
    Abstract: An electrostatic precipitating apparatus for an air conditioning system is disclosed. The precipitating apparatus includes an electrostatic precipitator including a plurality of discharge electrodes to which a voltage is applied and a plurality of electrostatic precipitating electrodes each disposed between the discharge electrodes and grounded, a washing water supply spraying the washing water to the electrostatic precipitator, and a frame assembly fixed to the duct to support the electrostatic precipitator. The frame assembly is fixed to the duct to support the electrostatic precipitator, and includes a prestressing locking member fixed to inside of the duct in a state in which a pressing force is applied to the electrostatic precipitator.
    Type: Application
    Filed: April 22, 2020
    Publication date: November 19, 2020
    Inventors: Jin Woon LEE, Sang Rin LEE, Jae Dong HWANG, Sang Chul MOON
  • Publication number: 20200360935
    Abstract: An electrostatic precipitating apparatus for a cooling tower is provided. The precipitating apparatus include an electrostatic precipitator including a plurality of discharge electrodes to which a voltage is applied and a plurality of electrostatic precipitating electrodes each disposed between the discharge electrodes and grounded, a washing water supply spraying the washing water to the electrostatic precipitator, and a frame assembly supporting the electrostatic precipitator. The electrostatic precipitator includes a first setting beam having a plurality of lower slots into which the discharge electrodes are fixedly inserted, and the frame assembly includes a lower frame extending in a stacking direction of the discharge electrodes to support the first setting beam, via which a voltage is applied to the discharge electrode.
    Type: Application
    Filed: April 23, 2020
    Publication date: November 19, 2020
    Inventors: Jin Woon LEE, Sang Rin LEE, Jae Dong HWANG, Sang Chul MOON
  • Publication number: 20200353480
    Abstract: Disclosed herein is an electrostatic precipitator apparatus that includes a housing having an inlet, into which gas is introduced, and an outlet from which the gas is discharged, and a collection module installed in the housing. The collection module includes a plurality of discharge electrodes, to which a voltage is applied, and a plurality of collection electrodes grounded and disposed between the discharge electrodes. The apparatus further comprises a washing water feeder to spray washing water to the collection module, and a washing water treatment device disposed beneath the collection module to accommodate the washing water dropped from the collection module.
    Type: Application
    Filed: April 22, 2020
    Publication date: November 12, 2020
    Inventors: Jin Woon LEE, Sang Rin LEE, Jae Dong HWANG, Sang Chul MOON
  • Patent number: 10833640
    Abstract: A buffer circuit may include: an amplifying circuit configured to change, based on a first input signal and a second input signal, voltage levels of a first output node and a second output node in a range between a first power voltage and a second power voltage; a latch circuit configured to latch the voltage levels of the first output node and the second output node; a first variable load configured to adjust, based on a reset signal, an amount of current provided by a first power voltage terminal at the first power voltage to the first output node; a second variable load configured to adjust, based on the reset signal, an amount of current provided by the first power voltage terminal to the second output node; and a reset circuit configured to drive the first output node to the second power voltage based on the reset signal.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: November 10, 2020
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Patent number: 10783097
    Abstract: A receiver includes an amplification circuit and a compensation circuit. The amplification circuit changes a voltage level of a first output node based on an input signal and changes a voltage level of a second output node based on a reference voltage. The compensation circuit changes the voltage level of the second output node based on the input signal and changes the voltage level of the first output node based on the reference voltage. The amplification circuit includes first type transistors configured to receive the input signal and the reference voltage. The compensation circuit includes second type transistors configured to receive the input signal and the reference voltage.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: September 22, 2020
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Publication number: 20200293082
    Abstract: A clock distribution circuit may include a data clock generation circuit configured to be input a power source voltage and configured to generate an internal clock signal according to an external clock signal; and a global distribution circuit includes a first circuit and a second circuit coupled to a global line, configured to be input a power source voltage and configured to receive the internal clock signal through the first circuit and distribute the internal clock signal to an exterior of the clock distribution circuit through the second circuit, wherein a first bias voltage provided to the first circuit and a second bias voltage provided to the second circuit are controlled independently of each other.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Applicant: SK hynix Inc.
    Inventors: Soo Young JANG, Dae Han KWON, Geun Il LEE, Kyu Dong HWANG
  • Patent number: 10755761
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: August 25, 2020
    Assignee: SK hynix Inc.
    Inventors: Sang Kwon Lee, Kwang Soon Kim, Young Hoon Kim, Young Jun Yoon, Kyu Dong Hwang
  • Patent number: 10720199
    Abstract: A buffering circuit includes a first signal input/output unit that generates an output bar signal in response to an input signal, a second signal input/output unit that generates an output signal in response to an input bar signal, and a connection unit that electrically connects and disconnects an output node of the first signal input/output unit and a current sink node of the second signal input/output unit to/from each other in response to a control signal, and electrically connects and disconnects a current sink node of the first signal input/output unit and an output node of the second signal input/output unit to/from each other in response to the control signal.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: July 21, 2020
    Assignee: SK hynix Inc.
    Inventors: Kyu Dong Hwang, Dae Han Kwon
  • Publication number: 20200220537
    Abstract: A semiconductor apparatus may be provided. The semiconductor apparatus may include a first buffer configured to generate a first preliminary clock and a first preliminary clock bar based on an external clock, an external clock bar, and a node voltage code. The semiconductor apparatus may include a node voltage control circuit configured to generate the node voltage code based on a control code.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Applicant: SK hynix Inc.
    Inventor: Kyu Dong HWANG
  • Publication number: 20200139646
    Abstract: A method of fabricating a plank stringer for use in an aircraft includes grouping a plurality of stacked plies of reinforcing material into a plurality of charges, where each charge in the plurality of charges includes a substack of plies. The method also includes grouping the plurality of charges into two or more groups such that, for each charge in a given group, a respective substack of plies includes a sequence of orientation angles with respect to a longitudinal axis of the plank stringer corresponding to the given group. The method also includes laying up each group of charges as a continuous blanket of plies, where each continuous blanket of plies includes the respective substack of plies for each charge in the respective group. The method also includes cutting each continuous blanket of plies into the respective group of charges and stacking the plurality of charges to form the plank stringer.
    Type: Application
    Filed: November 1, 2018
    Publication date: May 7, 2020
    Inventors: Scott M. Spencer, Jessica R. Hughes, Jae Dong Hwang, Joseph L. Sweetin, Kanna M. Pham, Jaime C. Garcia, Gregory P. Freed, Frederick T. Calkins, Cynthia G. Feng, Jiangtian Cheng
  • Patent number: 10637464
    Abstract: A semiconductor apparatus may be provided. The semiconductor apparatus may include a first buffer configured to generate a first preliminary clock and a first preliminary clock bar based on an external clock, an external clock bar, and a node voltage code. The semiconductor apparatus may include a node voltage control circuit configured to generate the node voltage code based on a control code.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: April 28, 2020
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Patent number: 10594265
    Abstract: A semiconductor device may include an amplification circuit. The amplification circuit may be configured to generate an output signal and an output bar signal based on a mode signal, first and second control signals, an input signal, and an input bar signal. The amplification circuit may determine voltage levels of the output signal and the output bar signal based on the mode signal and the first and second control signals regardless of the input signal and the input bar signal.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: March 17, 2020
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Publication number: 20200043542
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Applicant: SK hynix Inc.
    Inventors: Sang Kwon LEE, Kwang Soon KIM, Young Hoon KIM, Young Jun YOON, Kyu Dong HWANG
  • Patent number: 10523212
    Abstract: A semiconductor device may include an input control circuit, a counting circuit, an output control circuit, and a counting operation control circuit. The input control circuit may output a counting input signal based on an input signal and a counting over signal. The counting circuit may generate a preliminary counting code based on the counting input signal. The output control circuit may generate a counting code based on the preliminary counting code. The counting operation control circuit may generate the counting over signal based on a part of the counting code.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang
  • Patent number: 10522206
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventors: Sang Kwon Lee, Kwang Soon Kim, Young Hoon Kim, Young Jun Yoon, Kyu Dong Hwang
  • Publication number: 20190386623
    Abstract: An amplifier circuit includes a first input unit, a second input unit, a first current supply unit, and a second current supply unit. The first input unit changes a voltage level of a first output node based on a first input signal. The second input unit changes a voltage level of a second output node based on a second input signal. The first current supply unit supplies a first current to the first output node based on a voltage level of the first output node and boosts the voltage level of the first output node for a predetermined time when the voltage level of the first output node is changed. The second current supply unit supplies a second current to the second output node based on the voltage level of the first output node.
    Type: Application
    Filed: March 28, 2019
    Publication date: December 19, 2019
    Applicant: SK hynix Inc.
    Inventor: Kyu Dong HWANG
  • Patent number: 10482942
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: November 19, 2019
    Assignee: SK hynix Inc.
    Inventors: Sang Kwon Lee, Kwang Soon Kim, Young Hoon Kim, Young Jun Yoon, Kyu Dong Hwang