Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.

Abstract: A method for isolating proteins from prokaryotes is disclose. The method enables easy break down of bacterial cell walls to obtain intact proteins without damage by a simple process of adding organic solvents including lower alcohols or nitrile derivatives; or applying osmotic stimulation to samples containing pathogenic bacteria or the like. The method may be usefully applied to rapid and accurate identification of periplasmic proteins of gram-negative bacteria without additional purification process.

Abstract: An FMCW radar transmission and reception apparatus radiates, via a transmission antenna, a beat frequency signal of a frequency modulation continuous wave (FMCW) and then receives, via a reception antenna, a reflected signal obtained from the radiated frequency modulation continuous wave (FMCW) signal that is reflected by a target and returns, wherein the frequency of a beat signal of a frequency modulation continuous wave (FMCW) radar can be effectively adjusted by configuring a plurality of phase locked loops (PLLs) used in a transmitter and a receiver, and using the same reference oscillation signal for the plurality of PLLs.

Abstract: A DC-DC converter device and a sub DC-DC converter unit with parallel structure included in the same are disclosed. The DC-DC converter device includes a main DC-DC converter unit configured to receive a (1-1)th reference voltage, a (1-2)th reference voltage and a (n?1)th output voltage, and output an nth first output current corresponding to an nth output voltage; and a sub DC-DC converter unit configured to receive a second reference voltage and the (n?1)th output voltage, and output an nth second output current corresponding to the nth output voltage. Here, an output current in accordance with the nth output voltage corresponds to sum of the nth first output current and the nth second output current.

Abstract: A DC-DC converter device and a sub DC-DC converter unit with parallel structure included in the same are disclosed. The DC-DC converter device includes a main DC-DC converter unit configured to receive a (1-1)th reference voltage, a (1-2)th reference voltage and a (n-1)th output voltage, and output an nth first output current corresponding to an nth output voltage; and a sub DC-DC converter unit configured to receive a second reference voltage and the (n-1)th output voltage, and output an nth second output current corresponding to the nth output voltage. Here, an output current in accordance with the nth output voltage corresponds to sum of the nth first output current and the nth second output current.

Abstract: A complementary Colpitts voltage-controlled oscillator having the properties of low power and low phase noise are disclosed. The disclosed complementary Colpitts voltage-controlled oscillator includes: a first circuit composed as a PMOS Colpitts voltage-controlled oscillator having a first PMOS transistor, a first current source, a first capacitor, a second capacitor, and a first inductor but with the first inductor removed; a second circuit composed as an NMOS Colpitts voltage-controlled oscillator having a first NMOS transistor, a second current source, a third capacitor, a fourth capacitor, and a second inductor but with the second inductor removed; and a first transformer and a second transformer arranged between the first circuit and the second circuit.

Abstract: A card-type information recording medium having an embedded antenna for NFC communication is provided. The card-type information recording medium includes: a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process; an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB; and a molding material that is formed on the top of the PCB to cover the NFC communication unit and the USIM card unit. Accordingly, it is possible to perform functions of NFC and RFID read/tag by only mounting a USIM device thereon without adding any module or any constituent having an antenna function to a mobile terminal.

Abstract: Disclosed herein is a power generating circuit including a first transistor in which a second control signal is applied to a control terminal and a first control signal is applied to one end, and which has the other end connected to an output terminal, a second transistor in which the first control signal is applied to a control terminal and the second control signal is applied to one end, and which has the other end connected to the output terminal a third transistor in which one of the first and the second control signals is applied to a control terminal and which has one end grounded, and a fourth transistor in which the other one thereof is applied to a control terminal and which has one end connected to the other end of the third transistor and the other end connected to the output terminal.

Abstract: A complementary Colpitts voltage-controlled oscillator having the properties of low power and low phase noise are disclosed. The disclosed complementary Colpitts voltage-controlled oscillator includes: a first circuit composed as a PMOS Colpitts voltage-controlled oscillator having a first PMOS transistor, a first current source, a first capacitor, a second capacitor, and a first inductor but with the first inductor removed; a second circuit composed as an NMOS Colpitts voltage-controlled oscillator having a first NMOS transistor, a second current source, a third capacitor, a fourth capacitor, and a second inductor but with the second inductor removed; and a first transformer and a second transformer arranged between the first circuit and the second circuit.

Abstract: A card-type information recording medium including a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process, an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB, and a molding material that is formed on the top of the PCB so as to cover the NFC communication unit and the USIM card unit.

Abstract: An NFC transmitter using a delay-locked loop and an NFC transmission method thereof are provided. The NFC near field communication (NFC) transmitter includes a delay-locked loop (DLL) that outputs a reference clock and a delayed clock using the reference clock and a value of a duty code which are input, a clock output unit that receives the reference clock and the delayed clock, outputs the reference clock in any of a high section and a low section of input data, and outputs a converted clock having a duty ratio using the reference clock and the delayed clock in the other of the high section and the lower section of the input data, and an RF signal generator that generates an RF signal using a PWM (Pulse Width Modulation) signal input from the clock output unit.

Abstract: The present disclosure relates to a flexible electrode and a method for manufacturing the same, more particularly to a flexible electrode which has good flexibility and biocompatibility as well as good solderability for attachment of electronic parts and, hence, is widely applicable in such fields as ubiquitous healthcare monitoring and a method for manufacturing the same.

Abstract: The power generating circuit includes: a first transistor having a control terminal to which a second control signal is applied and one end to which a first control signal is applied; and a second transistor having a control terminal to which the first control signal is applied and one end to which the second control signal is applied, wherein the other ends of the first transistor and the second transistor are connected to an output terminal.

Abstract: A card-type information recording medium including a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process, an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB, and a molding material that is formed on the top of the PCB so as to cover the NFC communication unit and the USIM card unit.

Abstract: An inverter and an antenna circuit. The inverter that receives control signals including a first control signal, a second control signal, and a third control signal, inverts the first control signal, and outputs the inverted first control signal, includes: a first MOS transistor having a gate to which the first control signal is applied and a source that is grounded; a second MOS transistor having a gate to which the third control signal is applied and a source to which the second control signal is applied; and a third MOS transistor having a gate to which the second control signal is applied and a source to which the third control signal is applied, wherein drains of the first MOS transistor, the second MOS transistor, and the third MOS transistor are connected to an output terminal.

Abstract: A down-frequency conversion circuit and up-frequency conversion circuit, and a receiver and transmitter applying the same are provided. The down-frequency conversion circuit includes a harmonic mixer and general mixer, and thus becomes able to convert frequency using one LO (Local Oscillator) frequency, thereby reducing burden on generating LO frequency.

Abstract: An RF switch circuit includes an RF switch including a first NMOS switch formed on a chip substrate, a switch controller including a second NMOS switch and a PMOS switch formed on the substrate, for controlling the RF switch, and a limiter including a deep N-type well diode formed on the substrate, for limiting an RF signal level transferred from the RF switch to the switch controller through the substrate. The first NMOS switch includes a first N-type terminal formed on a deep N-type well substrate formed on the substrate, for receiving a driving power through a first floating resistor, a P-type terminal for receiving a body power through a second floating resistor, and two second N-type terminals for receiving a gate power through a third floating resistor. The P-type and two second N-type terminals are formed on a P-type substrate formed on the deep N-type well substrate.

Abstract: A radio frequency (RF) switch circuit in which an RF switch and a switch controller are formed on a single CMOS substrate and floating resistors are connected to a deep N type well substrate, an N type well substrate, and a P type well substrate to thereby increase linearity with respect to input power.

Abstract: Disclosed herein is a power generating circuit including a first transistor in which a second control signal is applied to a control terminal and a first control signal is applied to one end, and which has the other end connected to an output terminal, a second transistor in which the first control signal is applied to a control terminal and the second control signal is applied to one end, and which has the other end connected to the output terminal a third transistor in which one of the first and the second control signals is applied to a control terminal and which has one end grounded, and a fourth transistor in which the other one thereof is applied to a control terminal and which has one end connected to the other end of the third transistor and the other end connected to the output terminal.

Abstract: The power generating circuit includes: a first transistor having a control terminal to which a second control signal is applied and one end to which a first control signal is applied; and a second transistor having a control terminal to which the first control signal is applied and one end to which the second control signal is applied, wherein the other ends of the first transistor and the second transistor are connected to an output terminal.