Abstract: An alignment key structure in a semiconductor device is provided. The alignment key structure includes an insulation layer formed on a substrate, and a passivation layer pattern formed on the insulation layer. The insulation layer includes a plurality of metal wirings. The passivation layer pattern includes a first opening that exposes at least one of the metal wirings. Moreover, the first opening has a width which is narrower than a width of the exposed metal wiring.

Abstract: A photomask includes a first region, a second region and a third region. The first and second regions are spaced apart by the third region. A first photomask type is disposed in the first region and a second photomask type, different from the first photomask type, is disposed in the second region. A dummy photomask pattern is disposed in the third region and is structured to form a dummy wafer pattern on a wafer.

Abstract: A semiconductor device with dummy patterns and methods of designing and making dummy patterns of a semiconductor device are provided. The method includes forming a first layout having main patterns, adding dot dummy patterns to the first layout to generate a second layout, and adding linked line/space dummy patterns to the second layout to generate a third layout. The dot dummy patterns may be oblique dot dummy patterns.

Abstract: An embodiment of the semiconductor device includes a semiconductor substrate having at least one cell region and a peripheral circuit region. An interlayer insulating layer is disposed on the semiconductor substrate. Storage node electrodes are disposed on the interlayer insulating layer of the cell region. An upper electrode is disposed to cover the substrate having the storage node electrodes, and has at least one opening exposing a predetermined portion of the peripheral circuit region. A planarized insulating layer is disposed over the upper electrode. Contact plugs are disposed to penetrate the planarized insulating layer, at least one opening of the upper electrode, and the interlayer insulating layer to be electrically connected to the semiconductor substrate.

Abstract: An alignment key structure in a semiconductor device is provided. The alignment key structure includes an insulation layer formed on a substrate, and a passivation layer pattern formed on the insulation layer. The insulation layer includes a plurality of metal wirings. The passivation layer pattern includes a first opening that exposes at least one of the metal wirings. Moreover, the first opening has a width which is narrower than a width of the exposed metal wiring.

Abstract: Provided is a carpet stretcher. The carpet stretcher includes: an engaging head comprised at a front end of the carpet stretcher that engages a carpet; a sliding member that is connected to a rear end of the engaging head to move the engaging head back and/or forth within a predetermined space; a housing unit that covers the sliding member; a driving unit that drives the sliding member; and a carpet fixing unit comprised at a rear end of the carpet stretcher to push and fix the carpet. While the carpet is fixed by the engaging head and the carpet fixing unit, the sliding member is moved a predetermined distance by the driving unit, and the engaging head forwards a distance that is equal to the distance by which the sliding member is moved, stretching the carpet.