Patents by Inventor Dong Kwon

Dong Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250122462
    Abstract: One embodiment of the present invention provides an ecotoxicity monitoring device using Aliivibrio fischeri, and an ecotoxicity monitoring method using the same. The ecotoxicity monitoring device includes a reaction tank module, an Aliivibrio fischeri culture unit, a diluted water supply unit, a sample supply unit, an optical measurement unit, a control unit and an analysis unit, wherein the analysis unit is configured to calculate a correction coefficient based on the initial light quantity value of a reference reaction tank measured through the optical measurement unit and the final light quantity value measured after a predetermined time has elapsed, and calculate the corrected light quantity values of a sample reaction tank and a dilution reaction tank based on the calculated correction coefficient.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 17, 2025
    Applicants: KOREA INSTITUTE OF OCEAN SCIENCE & TECHNOLOGY, DONGMOONENT CO., LTD.
    Inventors: Kyoung Jin LEE, Dong Kwon Lee, Jong Young Kim, Chul Woo Park, Moon Jin Lee, Hoon Choi
  • Publication number: 20250017678
    Abstract: According to an aspect of the present disclosure, a cart for optical coherence tomography includes a rotary catheter unit; a main body including a receiving member configured to receive the rotary catheter unit; a mobile unit coupled to a lower part of the main body and configured to move the main body on the ground; and a display unit connected to an upper part of the main body and configured to output information generated by the rotary catheter unit. Wherein the display unit is located inside at least two side surfaces of the main body.
    Type: Application
    Filed: January 22, 2024
    Publication date: January 16, 2025
    Inventors: Joo Soo KIM, Dong Kwon JANG, Soon Won JEONG, Sang Won WOO, Jin Su KIM, Tae Sung KIM
  • Publication number: 20240312914
    Abstract: Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device may include: a substrate comprising an active pattern; a source/drain pattern on the active pattern; a device isolation layer at a lateral side of the active pattern; a lower power structure below a top surface of the substrate; a lower contact penetrating the device isolation layer and connecting the source/drain pattern to the lower power structure; and a power delivery network layer below the top surface of the substrate, wherein the lower power structure comprises a connecting portion connected to the lower contact, and wherein the lower contact comprises a protruding portion buried in the connecting portion.
    Type: Application
    Filed: September 19, 2023
    Publication date: September 19, 2024
    Applicant: SAMSUNG ELECTRONICS CO, LTD
    Inventors: JEONGYEON SEO, DONG KWON KIM, HYONWOOK RA, HONGSIK SHIN
  • Patent number: 12068242
    Abstract: A semiconductor device including a gate pattern on a substrate and including a gate dielectric layer, a gate electrode, and a gate capping pattern that are sequentially stacked; a gate spacer on a sidewall of the gate pattern; a source/drain pattern in the substrate; a contact pad on the source/drain pattern, a source/drain contact on the contact pad; and a buried dielectric pattern between the gate spacer and the source/drain contact, wherein the gate spacer includes a first segment between the gate electrode and the source/drain pattern; a second segment that extends from the first segment and between the gate electrode and the source/drain contact; and a third segment on the second segment, the buried dielectric pattern is between the third segment and the source/drain contact, and is absent between the first segment and the contact pad and is absent between the second segment and the source/drain contact.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: August 20, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hongsik Shin, Dong Kwon Kim, Jinwook Lee, Jongchul Park, Wonhyuk Lee
  • Patent number: 11938457
    Abstract: The present disclosure relates to an apparatus for preparing an oligomer, the apparatus including: a reactor for oligomerizing a feed stream containing a fed monomer; a stirrer inserted into a hole formed in an upper portion of the reactor; and a solvent transfer line extending inward from a side of the reactor, wherein the stirrer includes a rotating shaft vertically extending downward from the upper portion of the reactor, and a blade having a conical shape whose vertex is positioned at a lower end of the rotating shaft and outer diameter increases from a bottom toward a top, and the solvent transfer line has a plurality of spray nozzles formed in a direction toward the blade.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 26, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Hong Min Lee, Jeong Seok Lee, Jong Hun Song, Kyung Seog Youk, Dong Kwon Lee, Moon Sub Hwang
  • Patent number: 11869938
    Abstract: A semiconductor device includes a substrate, a first active pattern that includes a first side wall and a second side wall opposite to the first side wall in a second horizontal direction, a first insulating structure in a first trench extending in the first horizontal direction on the first side wall of the first active pattern, a second insulating structure in a second trench extending in the first horizontal direction on the second side of the first active pattern, and includes a first insulating layer on side walls and a bottom surface of the second trench, and a second insulating layer in the second trench on the first insulating layer, a gate-cut extending in the first horizontal direction on the first insulating structure, and a gate electrode extending in the second horizontal direction on the first active pattern.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: January 9, 2024
    Inventors: Hae Geon Jung, Dong Kwon Kim, Cheol Kim
  • Patent number: 11849720
    Abstract: The present invention provides a a nanostructure which includes: a core comprising one or more planes configured to come into planar contact with at least one plane of an ice crystal; and an oligopeptide which is conjugated to at least one plane of the core and comprises (Thr)n-, (Ala)n-, (Ser)n-, or (Gly)n-, wherein the nanostructure is a polyhedron-shaped nanostructure present in water in a colloidal form to control freezing, and n is an integer of 2 to 7.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: December 26, 2023
    Assignee: Korea University Research and Business Foundation
    Inventors: Seungwoo Lee, Dong June Ahn, Dong Kwon Lim, Jae Won Lee, Sang Yup Lee
  • Patent number: 11826413
    Abstract: Provided is a pharmaceutical composition including attenuated Streptococcus pneumoniae strains, and a method thereof for prevention or treatment of inflammatory diseases, respiratory viral infections, bacterial infectious diseases, or allergic diseases.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: November 28, 2023
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Dong-Kwon Rhee, Seung-Han Seon, Bo-Gyung Kim
  • Publication number: 20230231024
    Abstract: The semiconductor device including an active pattern on a substrate and extending in a first direction, a gate structure on the active pattern, including a gate electrode extending in a second direction different from the first direction, a source/drain pattern on at least one side of the gate structure, and a source/drain contact on the source/drain pattern and connected to the source/drain pattern, wherein with respect to an upper surface of the active pattern, a height of an upper surface of the gate electrode is same as a height of an upper surface of the source/drain contact, and the source/drain contact comprises a lower source/drain contact and an upper source/drain contact on the lower source/drain contact, may be provided.
    Type: Application
    Filed: November 8, 2022
    Publication date: July 20, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hong Sik SHIN, Jeong Yeon SEO, Sung Woo KANG, Dong Kwon KIM
  • Publication number: 20230231295
    Abstract: An electronic device is provided. An electronic device includes a radio frequency integrated circuit (RFIC) chip, and an antenna array electrically connected to the RFIC chip, the antenna array including a first face and a second face facing each other in a first direction, and a third face and a fourth face connecting the first and second faces to each other and facing each other in a second direction intersecting the first direction, the antenna array including a plurality of substrates sequentially stacked in a third direction intersecting a plane defined by the first and second directions, first and second antenna modules on the plurality of substrates and sequentially arranged along the first direction, a first metal partition-wall including at least one metal via extending through the plurality of substrates in the third direction, and a second metal partition-wall surrounding the first to fourth faces.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 20, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min Young Yoon, Young Ki Lee, Kyeol Kwon, Dong Kwon Choi, Doo Seok Choi, Joon Hoi Hur
  • Publication number: 20230097116
    Abstract: The present disclosure discloses a method for preparing a hybrid-type fluorine-based nonionic surfactant capable of producing a high purity material in a high yield. By preparing a hybrid-type fluorine-based nonionic surfactant according to the present disclosure, the surfactant is mass-produced in a high yield through controlling reaction conditions including a solvent.
    Type: Application
    Filed: May 31, 2022
    Publication date: March 30, 2023
    Applicant: MIYOUTECH CO., LTD.
    Inventors: Woong-Ku KANG, Seok-Heon Oh, Soon-Dong Kwon, Mi-Jung Park, Hyun-Sun Ahn, Yong-II Choi, Ji-Hwan Jeon
  • Publication number: 20230101416
    Abstract: The present disclosure discloses a fluoroalkyl glycerin derivative usable as an excellent surfactant by having functional groups and the number of carbon atoms controlled in the molecular structure, and its use as a surfactant. A fluoroalkyl glycerin derivative according to the present disclosure is used as a fluorine-based nonionic surfactant, and replaces existing fluoro compounds as well as having excellent surfactant properties compared to existing surfactants having a linear alkyl group.
    Type: Application
    Filed: May 31, 2022
    Publication date: March 30, 2023
    Applicant: MIYOUTECH CO., LTD.
    Inventors: Woong-Ku KANG, Seok-Heon OH, Soon-Dong KWON, Mi-Jung PARK, Hyun-Sun AHN, Yong-Il CHOI, Ji-Hwan JEON
  • Patent number: 11611488
    Abstract: A machine learning technology-based fault management system for network equipment that supports SDN OpenFlow protocol that includes an L2 switch or a router, which is network equipment connected to a client; and an Artificial Intelligence (AI)-based Software Defined Network (SDN) controller requested for management commands for each scenario when the L2 switch or the router, which is network equipment connected to the client, encounters a network fault so that a Simple Network Management System (SNMP) agent installed in the L2 switch and the router determines the type of fault occurred on a network and AI is employed to recover from a current fault through learning results from past data. An effect is achieved that not only service quality is improved through real-time fault management using an AI-based automatic response against a network fault but also a fault is precisely overcome by using the AI-based automatic response.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: March 21, 2023
    Assignee: SBIT CO., LTD.
    Inventor: Dong Kwon Yoon
  • Publication number: 20230058116
    Abstract: A semiconductor device includes a substrate, an active pattern disposed on the substrate and that extends in a first horizontal direction, a field insulating layer disposed on the substrate and that surrounds a sidewall of the active pattern, a gate electrode disposed on the field insulating layer and that extends in a second horizontal direction, a source/drain region disposed on a side of the gate electrode, a first interlayer insulating layer disposed on the field insulating layer and that surrounds a portion of a sidewall of the source/drain region, a second interlayer insulating layer disposed on the first interlayer insulating layer and that surrounds a sidewall of the gate electrode, and a source/drain contact that penetrates through the second interlayer insulating layer and is electrically connected to the source/drain region. The source/drain contact includes a skirt that protrudes from a lower sidewall toward the second interlayer insulating.
    Type: Application
    Filed: April 13, 2022
    Publication date: February 23, 2023
    Inventors: HONG SIK SHIN, Sung Woo KANG, Dong Kwon KIM
  • Publication number: 20230031542
    Abstract: A semiconductor device includes: a substrate; an active pattern and a field insulating layer surrounding a sidewall of the active pattern on the substrate; first and second gate electrodes on the active pattern and extending in a direction different from that of the active pattern; an interlayer insulating layer surrounding a sidewall of each of the first and second gate electrodes; a gate spacer on opposing sidewalls of each of the first and second gate electrodes that includes a first sidewall and a second sidewall opposite the first sidewall in the first horizontal direction, each of which contacts the interlayer insulating layer; and a first gate cut dividing the second gate electrode into two portions, wherein the first gate cut includes a same material as the gate spacer; and wherein a first width of the first gate cut is smaller than a second width of the gate spacer.
    Type: Application
    Filed: April 8, 2022
    Publication date: February 2, 2023
    Inventors: Hyun Ho Jung, Dong Kwon Kim, Cheol Kim
  • Publication number: 20220376046
    Abstract: A semiconductor device is provided.
    Type: Application
    Filed: January 17, 2022
    Publication date: November 24, 2022
    Inventors: Cheol Kim, Jeong Yeon Seo, Dong Kwon Kim, Hyun Ho Jung
  • Patent number: 11505657
    Abstract: The system for preparing silica aerogel according to the present invention comprises a raw material supply part transferring at least one raw material of de-ionized water, water glass, a surface modifier, an inorganic acid, and an organic solvent to a mixing part, the mixing part mixing the raw materials transferred from the raw material supply part to produce silica wet gel, a drying part drying the silica wet gel to produce the silica aerogel, a recovery part recovering a portion of the vaporized raw material of the raw materials used in at least one of the mixing part and the drying part, and a heat transfer part transferring heat to at least one of the mixing part and the drying part, wherein the system further comprises a pulverizing part that pulverizes the raw material from the row material supply part to the mixing part.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: November 22, 2022
    Assignee: LG CHEM, LTD.
    Inventors: Ye Hon Kim, Dong Kwon Lee, Jong Ku Lee, Je Kyun Lee
  • Publication number: 20220344461
    Abstract: A semiconductor device includes a substrate, a first active pattern that includes a first side wall and a second side wall opposite to the first side wall in a second horizontal direction, a first insulating structure in a first trench extending in the first horizontal direction on the first side wall of the first active pattern, a second insulating structure in a second trench extending in the first horizontal direction on the second side of the first active pattern, and includes a first insulating layer on side walls and a bottom surface of the second trench, and a second insulating layer in the second trench on the first insulating layer, a gate-cut extending in the first horizontal direction on the first insulating structure, and a gate electrode extending in the second horizontal direction on the first active pattern.
    Type: Application
    Filed: November 1, 2021
    Publication date: October 27, 2022
    Inventors: Hae Geon JUNG, Dong Kwon KIM, Cheol KIM
  • Publication number: 20220189870
    Abstract: A semiconductor device including a gate pattern on a substrate and including a gate dielectric layer, a gate electrode, and a gate capping pattern that are sequentially stacked; a gate spacer on a sidewall of the gate pattern; a source/drain pattern in the substrate; a contact pad on the source/drain pattern, a source/drain contact on the contact pad; and a buried dielectric pattern between the gate spacer and the source/drain contact, wherein the gate spacer includes a first segment between the gate electrode and the source/drain pattern; a second segment that extends from the first segment and between the gate electrode and the source/drain contact; and a third segment on the second segment, the buried dielectric pattern is between the third segment and the source/drain contact, and is absent between the first segment and the contact pad and is absent between the second segment and the source/drain contact.
    Type: Application
    Filed: July 13, 2021
    Publication date: June 16, 2022
    Inventors: Hongsik SHIN, Dong Kwon KIM, Jinwook LEE, Jongchul PARK, Wonhyuk LEE
  • Publication number: 20220173980
    Abstract: A machine learning technology-based fault management system for network equipment that supports SDN OpenFlow protocol that includes an L2 switch or a router, which is network equipment connected to a client; and an Artificial Intelligence (AI)-based Software Defined Network (SDN) controller requested for management commands for each scenario when the L2 switch or the router, which is network equipment connected to the client, encounters a network fault so that a Simple Network Management System (SNMP) agent installed in the L2 switch and the router determines the type of fault occurred on a network and AI is employed to recover from a current fault through learning results from past data. An effect is achieved that not only service quality is improved through real-time fault management using an AI-based automatic response against a network fault but also a fault is precisely overcome by using the AI-based automatic response.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 2, 2022
    Inventor: Dong Kwon YOON