Abstract: A decoder including a main memory, a flag memory and a decoding logic is provided. The flag memory is configured to store flag data and the decoding logic configured to perform an iteration. Further, the decoding logic is configured to: perform an ith operation using first data, wherein i is a natural number, flag-encode second data that is results obtained by performing the ith operation on the first data, store results obtained by performing the flag encoding on the second data in the flag memory as first flag data if the flag encoding succeeds, and store predetermined second flag data that is different from the first flag data of the second data in the flag memory if the flag encoding fails.

Abstract: An operating method of a memory controller that individually controls a plurality of memory units includes reading respective segments from the plurality of memory units based on a plurality of control signals; generating an output codeword based on the segments; performing error correction decoding on the output codeword; when a result of the error correction decoding indicates success, updating at least one of a plurality of accumulated error pattern information respectively corresponding to the plurality of memory units based on the result of the error correction decoding; and when the result of the error correction decoding indicates failure, regulating at least one of the plurality of control signals based on at least one of the plurality of accumulated error pattern information.

Abstract: The present invention relates to a user knowledge tracing method with more improved accuracy, and an operating method for a user knowledge tracing system including a plurality of encoder neural networks and a plurality of decoder neural networks includes: inputting exercise information to a k-th encoder neural network and inputting response information to a k-th decoder neural network; generating query data, which is information on an exercise for which a user is to predict a correct answer probability, by reflecting a weight to the response information and generating attention information to be used as a weight for the query data by reflecting the weight to the exercise information; and training the user knowledge tracing system by using the attention information as the weight for the query data.

Abstract: Provided is a method for analyzing a user in a data analysis server, the method including; step A of establishing a question database comprising a plurality of questions, of collecting solving result data of a user for the plurality of questions, and of learning the solving result data, thereby generating a data analysis model for modeling the user; step B of generating an expert model that recommends learning data necessary for machine learning of the data analysis model; step C of extracting at least one question from the question database according to recommendation from the expert model, and of updating the data analysis model using solving result data of a user for the at least one extracted question; and step D of updating the expert model by applying, to update information of the data analysis model, a reward that is set in a direction to improve prediction accuracy of the data analysis model.

Abstract: An operating method of a storage controller which includes a high level decoder and a low level decoder includes generating first data that is a result of decoding initial data read from a nonvolatile memory device, and a first syndrome weight indicating an error level of the first data. The first data is output to a host when the first syndrome weight is a specific value. The high level decoder having a first error correction capability is selected to decode the first data, when the first syndrome weight exceeds a reference value, and the low level decoder having a second error correction capability lower than the first error correction capability is selected to decode the first data, when the first syndrome weight is the reference value or less.

Abstract: An operating method of a memory controller that individually controls a plurality of memory units includes reading respective segments from the plurality of memory units based on a plurality of control signals; generating an output codeword based on the segments; performing error correction decoding on the output codeword; when a result of the error correction decoding indicates success, updating at least one of a plurality of accumulated error pattern information respectively corresponding to the plurality of memory units based on the result of the error correction decoding; and when the result of the error correction decoding indicates failure, regulating at least one of the plurality of control signals based on at least one of the plurality of accumulated error pattern information.

Abstract: A decoder including a main memory, a flag memory and a decoding logic is provided. The flag memory is configured to store flag data and the decoding logic configured to perform an iteration. Further, the decoding logic is configured to: perform an ith operation using first data, wherein i is a natural number, flag-encode second data that is results obtained by performing the ith operation on the first data, store results obtained by performing the flag encoding on the second data in the flag memory as first flag data if the flag encoding succeeds, and store predetermined second flag data that is different from the first flag data of the second data in the flag memory if the flag encoding fails.

Abstract: An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.

Abstract: Disclosed herein is a method of providing user-customized learning content in a service server, which includes a) for a specific subject, configuring a problem database including at least one of multiple-choice problems each including at least one example, providing the problem to user devices, and collecting example selection data of users for the problem from the user devices, b) estimating a probability of right answer to the problem for each of the users using the example selection data of each of the users, and assuming that any user selects an example of any problem, calculating, for each problem, a change rate of probabilities of right answer to all problems contained in the problem database for the user, and sorting the problems contained in the problem database in the order of the high change rate to recommend them to the user.

Abstract: A nasal cannula according to an embodiment of the present invention includes: an oxygen supplying portion which forms a space inside in which a nose and a mouth of a user can be disposed and is able to supply oxygen in a state of being put on by the user into the nose of the user; and a mask portion to which the oxygen supplying portion is attached in a detachable manner therein and is configured to be put on a face of the user. Since a space in which a nose and a mouth of a user can be disposed is provided inside the oxygen supplying portion so that a user can put on the nasal cannula in a convenient state and the oxygen supplying portion is put on in a state of being supported by the mask portion, oxygen can be supplied into the nose of the user and at the same time external air can be filtered.

Abstract: An operating method of a memory controller is provided. The operating method includes receiving a first read data and a second conversion information, the second conversion information including data obtained by converting a second read data based on a linear operation, and the first read data and the second read data including data read from same memory cells; converting the first read data based on the linear operation to generate a first conversion information; performing a logical operation on the first conversion information and the second conversion information to generate an operation information; performing an inverse operation of the linear operation on the operation information to generate a reliability information; and correcting an error of the first read data based on the first read data and the reliability information.

Abstract: A storage device includes a nonvolatile memory device that includes a plurality of pages, each of which includes a plurality of memory cells, and a controller that receives first write data expressed by 2m states (m being an integer greater than 1) from an external host device. The controller in a first operating mode shapes the first write data to second write data, which are expressed by “k” states (k being an integer greater than 2) smaller in number than the 2m states, performs first error correction encoding on the second write data to generate third write data expressed by the “k” states, and transmits the third write data to the nonvolatile memory device for writing at a selected page from the plurality of pages.

Abstract: An error correction device includes a low density parity check (LDPC) decoder and an adaptive decoding controller. The LDPC decoder iteratively performs LDPC decoding on data by using a decoding parameter. The adaptive decoding controller calculates an error rate depending on a result of the LDPC decoding and adjusts the decoding parameter depending on the error rate.

Abstract: A method and system of recovering data includes reading reference codewords, which have code correlation with a target codeword, from a memory device when an error-correcting code (ECC) decoding process for a decoder input of the target codeword has failed. A decoder input of a corrected target codeword is generated based on an operation process using the target codeword and the reference codewords. An ECC decoding process is performed again on the decoder input of the corrected target codeword.

Abstract: An electronic device is provided. The electronic device includes a housing, a wireless communication circuit, a first antenna radiator electrically connected with a first ground, a second antenna radiator electrically connected with a second ground, a feeding unit that feeds at least one of the first antenna radiator or the second antenna radiator, and a first switch that operates at a first connection state where the feeding unit and the first antenna radiator are electrically connected to each other, at a second connection state where the feeding unit and the second antenna are electrically connected to each other, or at a third connection state where the feeding unit and the first antenna radiator are connected to each other and the feeding unit and the second antenna radiator are electrically connected to each other, based on a first control signal from the wireless communication circuit.

Abstract: A method of operating a decoder, which has variable nodes and check nodes, includes receiving variable-to-check (V2C) messages from the variable nodes using a first check node among the check nodes. The number of messages having a specific magnitude among the V2C messages is counted. The magnitude of a check-to-variable (C2V) message to be transmitted to a first variable node, among the variable nodes, is determined based on the count value and the magnitude of a V2C message of the first variable node.

Abstract: A method of operating a decoder, which has variable nodes and check nodes, includes receiving variable-to-check (V2C) messages from the variable nodes using a first check node among the check nodes. The number of messages having a specific magnitude among the V2C messages is counted. The magnitude of a check-to-variable (C2V) message to be transmitted to a first variable node, among the variable nodes, is determined based on the count value and the magnitude of a V2C message of the first variable node.

Abstract: A polar code encoding and decoding method includes generating a first and second sub-codewords. The sub-codewords correspond to pre-codewords, and the pre-codewords have a shared data aspect. The sub-codewords provide useful error-recovery for data stored in a memory. When data is read from the memory, decoding takes place. The data read operation may include hard decision decoding, soft decision decoding, or hard decision decoding followed by soft decision decoding. In the method, the shared data aspect is used to decode a first sub-codeword for which decoding was not initially successful. An apparatus is also provided.

Abstract: A memory system includes; a memory device, a memory controller including a first interface, a second interface, and a first data processor having a first error correction code (ECC) engine, and a field programmable gate array (FPGA) including a third interface connected to the first interface, a fourth interface connected to the second interface, a fifth interface connected to an external host, and a second data processor having a second ECC engine. The memory controller may configure a normal write operation path or highly reliable write operation path.