Patents by Inventor Dong-Seok Suh

Dong-Seok Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220231127
    Abstract: Provided is a semiconductor device comprising an active region on a substrate and including first and second sidewalls extending in a first direction and an epitaxial pattern on the active region, wherein the epitaxial pattern includes first and second epitaxial sidewalls extending from the first and second sidewalls, respectively, the first epitaxial sidewall includes a first epitaxial lower sidewall, a first epitaxial upper sidewall, and a first epitaxial connecting sidewall connecting the first epitaxial lower sidewall and the first epitaxial upper sidewall, the second epitaxial sidewall includes a second epitaxial lower sidewall, a second epitaxial upper sidewall, and a second epitaxial connecting sidewall connecting the second epitaxial lower sidewall and the second epitaxial upper sidewall, a distance between the first and second epitaxial upper sidewalls decreases away from the active region, and the first and second epitaxial lower sidewalls extend in parallel to a top surface of the substrate.
    Type: Application
    Filed: April 7, 2022
    Publication date: July 21, 2022
    Inventors: Jung Gil YANG, Seung Min SONG, Soo Jin JEONG, Dong Il BAE, Bong Seok SUH
  • Patent number: 11393929
    Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: July 19, 2022
    Inventors: Jung Gil Yang, Woo Seok Park, Dong Chan Suh, Seung Min Song, Geum Jong Bae, Dong Il Bae
  • Publication number: 20220203334
    Abstract: Disclosed are a catalyst for oxidative coupling reaction of methane, a method for preparing the same, and a method for oxidative coupling reaction of methane using the same. The catalyst includes a mixed metal oxide, which is a mixed oxide of metals including sodium (Na), tungsten (W), manganese (Mn), barium (Ba) and titanium (Ti). It is possible to obtain paraffins, such as ethane and propane, and olefins, such as ethylene and propylene, with high efficiency through the method for oxidative coupling reaction of methane using the catalyst.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 30, 2022
    Inventors: Jeong-Myeong HA, Lien Thi DO, Jae Wook CHOI, Dong Jin SUH, Young Hyun YOON, Gi Seok YANG, Hyun Joo LEE
  • Patent number: 9046358
    Abstract: A method includes providing packets to demodulate a modulated photon signal output from a light source, wherein each packet includes a first interval and a second interval, and providing oscillation signals respectively having different phases from one another to photogates during the first interval of each of the packets. The light source is disabled and a direct current (DC) voltage is provided to the photogates during the second interval of each of the packets.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: June 2, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Yon Lee, Young Gu Jin, Dong Ki Min, Dong Seok Suh, Jae Pil Kim
  • Patent number: 8937711
    Abstract: A sensor, including a plurality of photo gate pairs on a semiconductor substrate, each of the photo gate pairs including a first photo gate and a second photo gate, a first shared floating diffusion region in the semiconductor substrate, and a plurality of first transmission transistors on the semiconductor substrate, wherein each of the plurality of first transmission transistors is adapted to transmit charges to the first shared floating diffusion region in response to a first transmission control signal, the charges being generated in the semiconductor substrate under the first photo gate of each of the plurality of photo gate pairs.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: January 20, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk Pil Kim, Yoon Dong Park, Dong Seok Suh, Young Gu Jin, Seung Hoon Lee
  • Patent number: 8742514
    Abstract: A storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: June 3, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Seok Suh, Tae-Seong Park
  • Patent number: 8471232
    Abstract: A resistive memory device includes a vertical transistor and a variable resistance layer. The vertical transistor includes a gate electrode on a surface of a substrate, a gate insulation layer extending along a sidewall of the gate electrode, and a single crystalline silicon layer on the surface of the substrate adjacent to the gate insulation layer. At least a portion of the single crystalline silicon layer defines a channel region that extends in a direction substantially perpendicular to the surface of the substrate. The variable resistance layer is provided on the single crystalline silicon layer. The variable resistance layer is electrically insulated from the gate electrode. Related devices and fabrication methods are also discussed.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: June 25, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok-kee Kim, In Kyeong Yoo, Kyoung-won Na, Kwnag-Soo Seol, Dong-Seok Suh
  • Patent number: 8319291
    Abstract: Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: November 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok-kee Kim, June-mo Koo, Ju-chul Park, Kyoung-won Na, Dong-seok Suh, Bum-seok Seo, Yoon-dong Park
  • Patent number: 8218359
    Abstract: A phase change memory device includes a switching device, a phase change storage node connected to the switching device, and a gate electrode which is spaced apart from the phase change storage node and increases an electrical resistance of the storage node during a reset programming operation. The gate electrode may be disposed around the phase change storage node, and may be used for applying an electric field to the phase change storage node.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: July 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-seok Suh
  • Publication number: 20120147658
    Abstract: A system for measuring a resistance of a memory cell in a resistive memory device can include a pulse generator configured to apply a data write pulse and a resistance read pulse to the resistive memory device with a delay time. A connecting member can be connected between the pulse generator and the resistive memory device. A test measurement device can be connected to the resistive memory device outputting a pulse waveform and a data-processing member can be configured to determine the resistance of the resistive memory device using the pulse waveform and an internal resistance of the test measurement device.
    Type: Application
    Filed: February 17, 2012
    Publication date: June 14, 2012
    Inventors: Young-Kuk Kim, Mi-Lim Park, Hori Ihideki, Dong-Seok Suh
  • Publication number: 20120132804
    Abstract: A thermal image sensor including a chalcogenide material, and a method of fabricating the thermal image sensor are provided. The thermal image sensor includes a first metal layer formed on a substrate; a cavity exiting the first metal layer adapted for absorbing infrared rays; a bolometer resistor formed on the cavity and including a chalcogenide material; and a second metal layer formed on the bolometer resistor. The thermal image sensor includes a first metal layer formed on a substrate; an insulating layer formed on the first metal layer; a bolometer resistor formed on the insulating layer, including a chalcogenide material and having a thickness corresponding to ΒΌ of an infrared wavelength (?); the thermal image sensor further includes a second metal layer formed on the bolometer resistor.
    Type: Application
    Filed: August 31, 2011
    Publication date: May 31, 2012
    Inventors: Tae-yon Lee, Dong-seok Suh, Yoon-dong Park
  • Publication number: 20120127789
    Abstract: A storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 24, 2012
    Inventors: Dong-Seok Suh, Tae-Sang Park
  • Patent number: 8144507
    Abstract: A method of measuring a resistance of a memory cell in a resistive memory device can be provided by applying a data write pulse to a selected cell of the resistive memory device, applying a resistance read pulse to the selected cell after a delay time measured from a time of applying the data write pulse, measuring a drop voltage at the cell responsive to a pulse waveform output when applying the resistance read pulse to the selected cell, measuring a total current through the cell using the drop voltage and an internal resistance of a test device coupled to the cell, and determining a resistance of the resistive memory device using the total current and a voltage of the resistance read pulse.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Kuk Kim, Mi-Lim Park, Hori Ihideki, Dong-Seok Suh
  • Patent number: 8120004
    Abstract: A storage node, a phase change memory device, and methods of operating and fabricating the same are provided. The storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer. A thickness of the phase change layer may be about 100 nm or less, and the lower electrode may be composed of an n-type thermoelectric material, and the upper electrode may be composed of a p-type thermoelectric material, or they may be composed on the contrary to the above.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: February 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Seok Suh, Tae-Sang Park
  • Patent number: 8101061
    Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: January 24, 2012
    Assignee: Board of Regents, The University of Texas System
    Inventors: Dong-Seok Suh, Ray Henry Baughman, Anvar Abdulahadovic Zakhidov
  • Patent number: 8085583
    Abstract: A phase change random access memory device is disclosed including a first electrode, a second electrode, a phase change material layer between the first and second electrode, a plurality of gate layers formed along the phase change material layer, an insulating film between the phase change material layer and the plurality of gate layers, and a plurality of interlayer insulating layers between the plurality of gate layers and between the first and second electrode and the plurality of gate layers, in which multiple bits of information may be stored in a single memory cell corresponding to the positions of the plurality of gate layers.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: December 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-seok Suh
  • Patent number: 8083909
    Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: December 27, 2011
    Assignee: Board of Regents, The University of Texas System
    Inventors: Dong-Seok Suh, Ray Henry Baughman, Anvar Abdulahadovic Zakhidov
  • Patent number: 8080149
    Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: December 20, 2011
    Assignee: Board of Regents, The University of Texas System
    Inventors: Dong-Seok Suh, Ray Henry Baughman, Anvar Abdulahadovic Zakhidov
  • Patent number: 8066855
    Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: November 29, 2011
    Assignee: Board of Regents, The University of Texas System
    Inventors: Dong-Seok Suh, Ray Henry Baughman, Anvar Abdulahadovic Zakhidov
  • Patent number: 8054672
    Abstract: Provided are a non-volatile memory device and a method of operating the non-volatile memory device. The non-volatile memory device includes a switching device and a storage node connected to the switching device, wherein the storage node comprises: a first electrode connected to the switching device; a chalcogenide material layer formed on the first electrode; and a second electrode formed on the chalcogenide material layer, and one of the first and second electrodes comprises an electrode contact layer formed adjacent to a limited region of the chalcogenide material layer, and a property of the electrode region adjacent to the chalcogenide material layer is changed reversibly according to the direction in which a current is applied, thereby changing between a high resistance state and a low resistance state.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-seok Suh, Jun-ho Lee