Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.

Abstract: A phase change random access memory device is disclosed including a first electrode, a second electrode, a phase change material layer between the first and second electrode, a plurality of gate layers formed along the phase change material layer, an insulating film between the phase change material layer and the plurality of gate layers, and a plurality of interlayer insulating layers between the plurality of gate layers and between the first and second electrode and the plurality of gate layers, in which multiple bits of information may be stored in a single memory cell corresponding to the positions of the plurality of gate layers.

Abstract: Provided are a phase change random access memory (PRAM), a method of fabricating the PRAM, and a method of operating the PRAM. The PRAM may include a gate electrode configured to temporarily increase an electrical resistance of the lower electrode contact layer if a voltage is applied to the gate electrode, and around the lower electrode contact layer between a switching device and a phase change layer. A spacer insulating layer is disposed between the lower electrode contact layer and the gate electrode.

Abstract: A phase change random access memory (PRAM), and a method of operating the PRAM are provided. In the PRAM comprising a switching element and a storage node connected to the switching element, the storage node comprises a first electrode, a second electrode, a phase change layer between the first electrode and a second electrode, and a heat efficiency improving element formed between the first electrode and the phase change layer. The heat efficiency improving element may be one of a carbon nanotube (CNT) layer, a nanoparticle layer, and a nanodot layer, and the nanoparticle layer may be a fullerene layer.

Abstract: A phase change memory device includes a switching device, a phase change storage node connected to the switching device, and a gate electrode which is spaced apart from the phase change storage node and increases an electrical resistance of the storage node during a reset programming operation. The gate electrode may be disposed around the phase change storage node, and may be used for applying an electric field to the phase change storage node.

Abstract: A programming method for a phase-change random access memory (PRAM) may be provided. The programming method may include determining an amorphous state of a chalcogenide material using programming pulses to form programming areas having threshold voltages corresponding to logic high and logic low, and/or controlling a trailing edge of programming pulses during programming to control a quenching speed of the chalcogenide material so as to adjust a threshold voltage of the chalcogenide material. Accordingly, programming pulses corresponding to logic low or logic high may have uniform magnitudes regardless of a corresponding logic level. Accordingly, reliability of a PRAM device may be improved.

Abstract: In a memory device, a transistor may be formed on a substrate, and a first electrode may be electrically connected thereto. A phase change material film may be vertically formed on the first electrode, and a second electrode may be formed on the phase change material film.

Abstract: Example embodiments may provide a doped phase change layer and a method of operating and fabricating a phase change memory with the example embodiment doped phase change layer. The phase change memory may include a storage node having a phase change layer and a switching device, wherein the phase change layer includes indium with a concentration ranging from about 5 at % to about 15 at %. The phase change layer may be a GST layer that includes indium. The phase change layer may be a GST layer that includes gallium.

Abstract: A phase change memory device including a phase change material layer having phase change nano particles and a method of fabricating the same are provided. The phase change memory device may include a first electrode and a second electrode facing each other, a phase change material layer containing phase change nano particles interposed between the first electrode and the second electrode and/or a switching device electrically connected to the first electrode. The phase change material layer may include an insulating material.

Abstract: In a memory device, a transistor may be formed on a substrate, and a first electrode may be electrically connected thereto. A phase change material film may be vertically formed on the first electrode, and a second electrode may be formed on the phase change material film.

Abstract: A PRAM and a fabricating method thereof are provided. The PRAM includes a transistor and a data storage capability. The data storage capability is connected to the transistor. The data storage includes a top electrode, a bottom electrode, and a porous PCM layer. The porous PCM layer is interposed between the top electrode and the bottom electrode.

Abstract: A phase change material layer includes antimony (Sb) and at least one of indium (In) and gallium (Ga). A phase change memory device includes a storage node including a phase change material layer and a switching device connected to the storage node. The phase change material layer includes Sb and at least one of In and Ga.

Abstract: A phase change memory device includes a phase change resistor and first and second electrodes. The first and second electrodes may be connected to opposite ends of the phase change resistor, respectively. In a programming operation, the resistance of the phase change resistor is changed to at least one of a plurality of stages by an electric signal applied in a direction from the first electrode to the second electrode and an electric signal applied in a direction from the second electrode to the first electrode. In a reading operation, the programmed resistance of the phase change resistor is read by applying an electric signal between the first electrode and the second electrode in an arbitrary direction.

Abstract: A PRAM and a fabricating method thereof are provided. The PRAM includes a transistor and a data storage capability. The data storage capability is connected to the transistor. The data storage includes a top electrode, a bottom electrode, and a porous PCM layer. The porous PCM layer is interposed between the top electrode and the bottom electrode.

Abstract: A memory device using a multi-layer with a graded resistance change is provided. The memory device includes: a lower electrode; a data storage layer being located on the lower electrode and having the graded resistance change; and an upper electrode being located on the data storage layer.

Abstract: A storage node, a phase change memory device, and methods of operating and fabricating the same are provided. The storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer. A thickness of the phase change layer may be about 100 nm or less, and the lower electrode may be composed of an n-type thermoelectric material, and the upper electrode may be composed of a p-type thermoelectric material, or they may be composed on the contrary to the above.

Abstract: In a memory device, at least one conductive contact having a width of less than, or equal to, about 30 nm may be formed on a first electrode. A dielectric layer may be formed on the sides of the at least one conductive contact, and a phase change material film may be formed on the conductive contact. A second electrode may be formed on the phase change material.

Abstract: Provided are a phase change material containing carbon (C), a memory device including the phase change material, and a method of operating the memory device. The phase change material contains a main compound and an additive, wherein the main compound is In—Sb—Te and the additive includes carbon (C). A content a of the carbon (C) may be 0.005?a?0.30 atomic (at) %. The additive may further contain nitrogen (N), oxygen (O), boron (B), or a transition metal. The additive may include carbide instead of the carbon (C).

Abstract: A storage node, a phase change memory device, and methods of operating and fabricating the same are provided. The storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer. A thickness of the phase change layer may be about 100 nm or less, and the lower electrode may be composed of an n-type thermoelectric material, and the upper electrode may be composed of a p-type thermoelectric material, or they may be composed on the contrary to the above.

Abstract: In a memory device, at least one conductive contact having a width of less than, or equal to, about 30 nm may be formed on a first electrode. A dielectric layer may be formed on the sides of the at least one conductive contact, and a phase change material film may be formed on the conductive contact. A second electrode may be formed on the phase change material.