Abstract: A method of manufacturing a light emitting diode (LED) includes growing a light emitting region on a temporary substrate, bonding a transparent substrate of glass or quartz to the light emitting region and then removing the temporary substrate. A metal bonding agent also serving as an ohmic contact layer with LED is used to bond the transparent substrate to form a dual substrate LED element which is then heated in a wafer holding device that includes a graphite lower chamber and a graphite upper cover with a stainless steel screw. Because of the different thermal expansion coefficients between stainless and graphite, the stainless steel screw applies a pressure to the dual substrate LED element during the heating process to assist the bonding of the transparent substrate.

Abstract: A method of manufacturing a light emitting diode (LED) includes growing a light emitting region on a temporary substrate, bonding a transparent substrate of glass or quartz to the light emitting region and then removing the temporary substrate. A metal bonding agent also serving as an ohmic contact layer with LED is used to bond the transparent substrate to form a dual substrate LED element which is then heated in a wafer holding device that includes a graphite lower chamber and a graphite upper cover with a stainless steel screw. Because of the different thermal expansion coefficients between stainless and graphite, the stainless steel screw applies a pressure to the dual substrate LED element during the heating process to assist the bonding of the transparent substrate.

Abstract: A heat-generating resistor comprised essentially of Ru and Ta at the following composition ratios:22 atom percent .ltoreq.Ru.ltoreq.66 atom percent and34 atom percent .ltoreq.Ta.ltoreq.78 atom percent,and an ink jet head which includes said heat-generating resistor are provided.

Abstract: A preparation method for an integrated assembly of a microchannel and an element is disclosed. In the preparation method of this invention, an element is prepared between a substrate and a sacrificial layer. Two protection layers, which are resistant to etchant for said substrate and said sacrificial layer, are prepared to isolate said element from its ambient environment. Said sacrificial layer defines an area to be etched off such that a microchannel may be formed. A coating layer with etching windows is then prepared on said sacrificial layer and the assembly is etched in an etchant to etch off said sacrificial layer and an area of said substrate beneath said sacrificial layer. An integrated assembly of a closed microchannel and an element is then accomplished. In the invented method, no bonding process is necessary and the integrated assembly so prepared has a planarization surface. This invention also disclosed a microchannel-element assembly prepared under the method of this invention.

Abstract: Deep groove structure for semiconductors comprising a semiconductor substrate, a groove or a cavity formed in said semiconductor substrate and a suspending glass membrane formed on the groove or deep cavity, prepared by a flame hydrolysis deposition process. The suspending glass membrane functions as a planarization structure and has surface at the same level of the surface of the semiconductor substrate. The present invention also discloses a method to prepare the deep groove structure.

Abstract: A method of automatically coupling between a fiber and an optical waveguide is disclosed. Such a scheme is achieved by the property of the different etching rate in the various wafer direction on a semiconductor material, especial silicon, and the shrinking property of the glass soot formed by a flame hydrolysis deposition technique during a high temperature consolidation process, for improving aligning accuracy. The manufacturing process of the method is described below. First, a waveguide buffer layer is formed on a semiconductor substrate, then a waveguide layer is formed on the semiconductor substrate and the waveguide buffer layer. A part of the waveguide is manipulated to the planar optical waveguide, meanwhile, several windows which lead to the I/O end of the planar waveguide are formed on the other waveguide layer. The semiconductor substrate beneath the windows is etched anisotropically to form several aligning grooves.

Abstract: A method for fabricating microelectromechanical systems containing a glass diaphragm formed on a silicon macrostructure is disclosed. The method comprises the steps of: (a) obtaining a silicon wafer and forming a cavity in the silicon wafer; (b) using a flame hydrolysis deposition technique to deposite glass soot into the cavity, the glass soot fills the cavity and extends onto the external surface of the silicon wafer so as to form a glass soot layer having a predetermined thickness; and (c) heat-consolidating the glass soot at temperatures between 850.degree. and 1,350.degree. C. so as to cause the glass soot to shrink and form a glass diaphragm over the cavity. The shrinkage ratio between the glass diaphragm and the glass soot layer is between 1:20 to 1:50. The silicon wafer can be further fabricated to contain a diaphragm-sealed cavity and/or a diaphragm-converted cantilever.

Abstract: A method for fabricating planar lightwave circuits with at least one static-alignment fiber-guiding groove comprising the steps of: (a) fabricating a sandwiched Si-substrate by forming an etching stop layer on a first Si layer, followed by forming a second Si layer on the etching stop layer; (b) forming a waveguide layer on the Si-substrate, the waveguide layer containing at least one planar waveguide channel buried between a first cladding layer and a second cladding layer; (c) forming a photomask on the waveguide layer so as to allow the fiber-guiding grooves to be fabricated; (d) using the photomask and a first reactive ion etching procedure to form a first portion of the fiber-guiding groove, the first reactive ion etching procedure is controlled such that it etches through the waveguide layer and stops at the second Si layer; and (e) using the photomask and a second reactive ion etching procedure to form a second portion of the fiber-guiding groove, wherein the second reactive etching ion is selected in