Patents by Inventor Dong Uk An

Dong Uk An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080225029
    Abstract: A driver may include a plurality of data output units and/or a multi-phase clock generator. The plurality of data output units may be configured to output data based on a plurality of clock signals. The multi-phase clock generator may be configured to receive a master clock signal to generate the plurality of clock signals having different phases in a period of the master clock signal and/or to provide the clock signals to the data output units. A number of the clock signals may correspond to a number of the data output units.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 18, 2008
    Inventor: Dong-Uk Park
  • Publication number: 20080224760
    Abstract: A reference voltage generator and an integrated circuit including the reference voltage generator. The reference voltage generator includes a band gap reference circuit and a start-up circuit. The band gap reference circuit provides a reference voltage to a load. The start-up circuit increases the provided reference voltage by providing a boosting current to the load based on a difference between the provided reference voltage and a target reference voltage responsive to a start-up signal, thereby reducing a time in which the provided reference voltage reaches the target reference voltage. Therefore, the reference voltage generator is configured to provide a target reference voltage within a predetermined time.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 18, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Uk PARK, Nak-Shin KIM
  • Publication number: 20080225609
    Abstract: A voltage generating circuit for a semiconductor memory apparatus according includes a data logic voltage generating unit that, when a data output unit outside a semiconductor memory apparatus outputs low-level data, generates an internal data logic voltage at the same potential level as the low-level data in response to an on-die termination signal. In addition, a reference voltage generating circuit for a semiconductor memory apparatus that uses the voltage generating circuit includes a reference voltage generating unit that can be configured to generate a reference voltage at an average potential level between a maximum potential and a minimum potential of input data.
    Type: Application
    Filed: December 28, 2007
    Publication date: September 18, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Dong Uk Lee, Shin Deok Kang
  • Publication number: 20080218292
    Abstract: A low voltage data transmitting circuit (LVDTC) may be connected to a first transmission line that transmits a first voltage signal to a receiver and a second transmission line that transmits a second voltage signal to the receiver. The LVDTC includes a first resistor coupled to the first transmission line, a second resistor coupled to the second transmission line, and a control unit coupled to the first transmission line and the second transmission line, the control unit being configured to control voltage levels of the first and second voltage signals such that the voltage levels of the first and second voltage signals are higher than a ground voltage level of the receiver, wherein the first and second voltage signals may constitute a differential pair.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 11, 2008
    Inventors: Dong-Uk Park, Jin-Ho Seo, Jae-Jin Park
  • Patent number: 7421262
    Abstract: A tuning method comprises: detecting a fundamental intermediate frequency IF0 of a channel to be received; determining whether the fundamental intermediate frequency IF0 is affected by an adjacent channel; when the fundamental intermediate frequency IF0 is affected by the adjacent channel, detecting a tuning intermediate frequency that is not affected by the adjacent channel while changing the fundamental intermediate frequency IF0; when there is no variable intermediate frequency that is not affected by the adjacent channel, detecting a variable intermediate frequency that is least affected by the adjacent channel as the tuning intermediate frequency; and tuning the channel using the tuning intermediate frequency.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: September 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Uk Seo
  • Publication number: 20080204079
    Abstract: A level shifting circuit includes a level shifting unit and an output buffer unit. The level shifting unit generates first and second output signals responsive to first and second input signals. The first and second input signals range between first and second voltage levels, and the first and second input signals are a first differential pair. The first and second output signals range between the first voltage level and a third voltage level greater than the second voltage level, and the first and second output signals are a second differential pair. The output buffer unit inverts the first and second output signals to provide third and fourth output signals, respectively. Duty ratios of the first and second output signals are determined based on delay times of the first and second input signals.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 28, 2008
    Inventor: Dong-Uk Park
  • Publication number: 20080187801
    Abstract: A fuel oxidizing catalyst, a method of preparing the same, and a reformer and a fuel cell system including the same. In one embodiment, the fuel oxidizing catalyst for a fuel cell includes CeO2, MO (wherein M is a transition metal), and CuO. In this embodiment, the fuel oxidizing catalyst has a relatively high (or excellent) catalytic activity for a fuel oxidizing catalyst reaction and performs a fuel oxidizing catalyst reaction at a relatively low temperature even though it does not include a noble metal.
    Type: Application
    Filed: November 9, 2007
    Publication date: August 7, 2008
    Inventors: Leonid Gorobinskiy, Ju-Yong Kim, Kie Hyun Nam, Jin-Goo Ahn, Man-Seok Han, Yong-Kul Lee, Sung-Chul Lee, Chan-Ho Lee, Jin-Kwang Kim, Dong-Uk Lee, Noboru Sato
  • Patent number: 7408483
    Abstract: An apparatus for generating a DBI signal in a semiconductor memory apparatus includes a data switching detection unit that detects whether or not previous data is consistent with current data and outputs a detection signal according to a detection result, and a DBI detection unit that outputs a DBI signal according to a difference in charge sharing level using the detection signal. Therefore, it is possible to minimize current consumption. Further, since there is no effect due to resistance skew of a transistor, an error in DBI signal generation and an error in data transfer accordingly can be prevented. Therefore, it is possible to improve the reliability of a system to which a semiconductor memory apparatus is applied.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: August 5, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong-Uk Lee
  • Publication number: 20080157811
    Abstract: A data output driver that reduces signal skew includes a data multiplexer which reduces a load of a path through which a pull-up/pull-down control signal is generated by a logic-combination of a data signal. It also decreases the number of bits of a pull-up/pull-down resistance-adjusting code signal, and outputs a data signal in response to high impedance information. Furthermore, a path of an output circuit is simplified through which a pull-up/pull-down control is generated in response to the data signal output from the data multiplexer.
    Type: Application
    Filed: July 18, 2007
    Publication date: July 3, 2008
    Inventors: Dong Uk LEE, Shin Deok KANG
  • Patent number: 7394722
    Abstract: Disclosed is a device for controlling data output of a memory device using a DLL clock signal, the device comprising: an output driver for outputting data; and a CAS latency control unit for generating a signal adjusting an operation timing of the output driver depending on CAS latency, wherein the CAS latency control unit generates a signal for controlling the output driver by using time difference between the DLL clock signal and an external clock applied to the memory device from an exterior.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: July 1, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong Uk Lee
  • Publication number: 20080152966
    Abstract: Disclosed are a carbon monoxide remover and a fuel cell reformer including the same. In the reformer, a reformed gas produced from a reforming reaction unit when the reformer is initially driven is used as a fuel for a heat source unit supplying heat to a water gas shift reaction unit. The carbon monoxide remover is connected to the reforming reaction unit that changes fuel into reformed gas with hydrogen. The carbon monoxide remover lowers carbon monoxide contained in the reformed gas. The carbon monoxide remover includes a heat source unit employing the reformed gas as a fuel; and a water gas shift reaction unit provided with a shift catalyst using heat from the heat source unit. The shift catalyst lowers the concentration of carbon monoxide in the reformed gas through reaction between water and carbon monoxide.
    Type: Application
    Filed: July 12, 2007
    Publication date: June 26, 2008
    Inventors: Sung Chul Lee, Ju Yong Kim, Yong Kul Lee, Man Seok Han, Chan Ho Lee, Jin Kwang Kim, Jin Goo Ahn, Dong Uk Lee, Leonid Gorobinskiy
  • Publication number: 20080142904
    Abstract: A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.
    Type: Application
    Filed: February 26, 2008
    Publication date: June 19, 2008
    Inventors: Ming Li, Dong-Uk Choi, Chang Woo Oh, Dong-Won Kim, Min-Sang Kim, Sung-Hwan Kim, Kyoung-Hwan Yeo
  • Patent number: 7387683
    Abstract: A coating apparatus includes support for supporting a mother substrate including unit substrates, a coater for coating the unit substrate with photosensitive materials, a detector for detecting foreign matters, a remover for removing the foreign matters from the unit substrate, and a controller for controlling the coater, detector, and remover. The coater includes a body containing the photosensitive materials, and inlet and outlet portions for inputting and outputting the photosensitive materials to/from the body. A width of the outlet portion is the same as that of the unit substrate. The detector is positioned at front of the coater to detect the foreign matters before the coating process. The remover removes the foreign matters. The coater discharges the photosensitive material only onto the unit substrate. Discharging of the photosensitive material is interrupted when the foreign matters are found.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: June 17, 2008
    Inventors: Seong-Bong Kim, Dong-Uk Choi
  • Publication number: 20080111596
    Abstract: The data output control signal generating circuit includes a delay correction signal generating unit that delays an input signal by a phase difference between a clock and a delay locked loop clock, and latches the delayed signal to generate a plurality of output enable signals. A column address strobe latency control multiplexer selects the output enable signal corresponding to column address strobe latency among the plurality of output enable signals, on the basis of the signal obtained by delaying the input signal by the phase difference between the clock and the delay locked loop clock, and outputs the selected signal as the data output control signal.
    Type: Application
    Filed: July 9, 2007
    Publication date: May 15, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventor: Dong Uk Lee
  • Publication number: 20080107931
    Abstract: Disclosed is a fuel cell system which includes a generator, a reformer generating a reformed gas by reforming a gaseous fuel and water and supplying the reformed gas to the generator. A fuel tank stores the gaseous fuel in a liquid state by compressing the gaseous fuel and supplying the gaseous fuel to the reformer. A water supply device supplies the water to the reformer. The water supply device includes a container connected to the fuel tank and the reformer and contains the water and the gaseous fuel with a pressure. A separation layer is formed on the surface of the water in the container for blocking a contact of the gaseous fuel with the water.
    Type: Application
    Filed: December 12, 2006
    Publication date: May 8, 2008
    Inventors: Man-Seok Han, Ju-Yong Kim, Chan-Ho Lee, Sung-Chul Lee, Yong-Kul Lee, Dong-Uk Lee, Jin-Kwang Kim, Jin-Goo Ahn, Gorobinskiy Leonid
  • Publication number: 20080107954
    Abstract: A fuel cell stack comprises: an electricity generating assembly including electricity generators based on a unit cell; a pair of pressing plates that respectively come in close contact with the outermost surfaces of the electricity generators so as to press the electricity generators; a plurality of connection rods connecting the pressing plates; a fastening member that is screwed to each of the connection rods so as to fasten the pressing plates; and a spacer that is disposed at each of the connection rods between the pressing plates so as to control a fastening pressure exerted by the fastening member.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 8, 2008
    Applicant: Samsung SDI Co., Ltd
    Inventors: Dong-Uk Lee, Chi-Seung Lee, Chan-Hee Park
  • Patent number: 7361545
    Abstract: A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ming Li, Dong-Uk Choi, Chang-Woo Oh, Dong-Won Kim, Min-Sang Kim, Sung-Hwan Kim, Kyoung-Hwan Yeo
  • Publication number: 20080090118
    Abstract: The carbon monoxide oxidizing catalyst for a reformer of a fuel cell system according to the present invention includes an active material including Au—Ag alloy nano-particles, and a carrier supporting the active material.
    Type: Application
    Filed: May 24, 2007
    Publication date: April 17, 2008
    Inventors: Leonid Gorobinskiy, Ju-Yong Kim, Jin-Kwang Kim, Dong-Myung Suh, Jin-Goo Ahn, Dong-Uk Lee, Sung-Chul Lee, Man-Seok Han, Chan-Ho Lee, Yong-Kul Lee
  • Patent number: 7356199
    Abstract: Disclosed herein is a mobile communication terminal equipped with a camera having an image distortion compensation function which compensates image distortion created by a luminance difference between pixels in the vicinity of a central portion of a pixel array of an image sensor and pixels in the vicinity of an outer portion of a pixel array of the image sensor by detecting a Y-component value of the central pixel of the pixel array of the image sensor and Y-component values of the pixels located diagonally to the central pixel, comparing the Y-component value of the central pixel with the Y-component values of the pixels located diagonally to the central pixel, generating compensation values for compensating signal distortion in each of the pixels located diagonally to the central pixel according to the comparison result, and outputting a distortion compensation command, together with the compensation values, to the ISP (image signal processor).
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: April 8, 2008
    Assignee: Curitel Communications, Inc.
    Inventors: Dong-Uk Min, Bo-Hong Seo
  • Publication number: 20080079638
    Abstract: A method of reducing electromagnetic field using metamaterial and a terminal having a structure for reducing an electromagnetic field using a metamaterial are provided. The method includes the steps of: deciding a body contacting part of a portable terminal or a wearable terminal; and disposing an electromagnetic field absorption member formed of metamaterial between an antenna and the decided body contacting part.
    Type: Application
    Filed: December 27, 2006
    Publication date: April 3, 2008
    Inventors: Hyung-Do Choi, Dong-Ho Kim, Dong-Uk Sim, Jae-Ick Choi, Ae-Kyoung Lee