Abstract: A thickness measuring device is provided. The thickness measuring device may include a terahertz wave signal processing unit configured to receive a terahertz wave according to at least one mode of a reflection mode and a transmission mode, a refractive index information acquisition unit configured to acquire refractive index information of the thickness measurement sample in consideration of second-time difference information between a first reflected terahertz wave and a second reflected terahertz wave, and a thickness information acquisition unit configured to acquire thickness information of the thickness measurement sample in consideration of the refractive index information.

Abstract: According to one embodiment of the present invention, A sample inspection device may provided, a total inspection module scanning a first area comprising a plurality of samples; a precision inspection module performing inspection on a sample determined as a suspected defective sample by the total inspection module in the first area; and a controller processing each data obtained from the total inspection module and the precision inspection module, and detecting a defective sample in the first area, wherein the precision inspection module may include an emitter emitting terahertz wave to the first area, a guide wire guiding an irradiation direction of the terahertz wave, and a vibration unit vibrating the guide wire.

Abstract: A method for measuring the thickness of a specimen, according to an embodiment, can measure the thickness of a specimen having multiple layers in a contactless and non-destructive manner. In addition, when the refractive indexes of materials forming the respective layers are already known, the thicknesses of the respective layers can be integrally measured through differences in reflection times of terahertz waves with respect to the respective layers of the specimen, thereby measuring the thickness of the specimen, such that the time taken for measuring the thickness of the specimen can be reduced.

Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.

Abstract: A thickness measuring device is provided. The thickness measuring device may include a terahertz wave signal processing unit configured to receive a terahertz wave according to at least one mode of a reflection mode and a transmission mode, a refractive index information acquisition unit configured to acquire refractive index information of the thickness measurement sample in consideration of second-time difference information between a first reflected terahertz wave and a second reflected terahertz wave, and a thickness information acquisition unit configured to acquire thickness information of the thickness measurement sample in consideration of the refractive index information.

Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.

Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.

Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.

Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.

Abstract: Provided is an arrow, wherein by forming a diameter of a shaft, at a fore end of which a point is combined and at a rear end of which a nock is combined, in such a way that the diameter is reduced going from the fore end to the rear end, a center of weight is shifted toward the fore end so as to increase a hitting ratio of the arrow and a deflection deformation is reduced.

Abstract: Provided is an arrow, wherein by forming a diameter of a shaft, at a fore end of which a point is combined and at a rear end of which a nock is combined, in such a way that the diameter is reduced going from the fore end to the rear end, a center of weight is shifted toward the fore end so as to increase a hitting ratio of the arrow and a deflection deformation is reduced.

Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.

Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.

Abstract: In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.

Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of a second pattern to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of a second pattern to image intensity on a first pattern. Neighboring regions of the first pattern are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the second pattern is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the first pattern and the term ? is the position of the assist.

Abstract: In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.

Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.

Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of an assist feature to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of an assist feature to image intensity on a main feature. Neighboring regions of the main feature are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the assist feature is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the main feature and the term ? is the position of the assist.

Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of a second pattern to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of a second pattern to image intensity on a first pattern. Neighboring regions of the first pattern are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the second pattern is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the first pattern and the term ? is the position of the assist.

Abstract: In positioning assist features on a photomask pattern to improve the image quality of the main features, the method includes deriving an h-function in a first process which represents a contribution of an assist feature with respect to image intensity at a main feature. In a continuation of the method, the position of the assist features are determined in a second process using the h-function derived in the first step. The assist features are then formed on the mask at the positions indicated. Also included is a computer readable medium having instructions for performing the h-function calculations, and the mask apparatus itself with both main and assist features positioned according to the h-function.