Patents by Inventor Dong-Woon Park

Dong-Woon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170372906
    Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.
    Type: Application
    Filed: January 19, 2017
    Publication date: December 28, 2017
    Inventors: Yun Kyeong JANG, Sang Jin KIM, Dong Woon PARK, Joon Soo PARK, Chang Jae YANG, Kwang Sub YOON, Hye Kyoung JUE
  • Publication number: 20170278745
    Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.
    Type: Application
    Filed: June 13, 2017
    Publication date: September 28, 2017
    Inventors: Jong-Su Kim, Dong-Woon Park, Tae-Hoi Park, Yong-Kug Bae, Tae-Hwan Oh, Chang-Hoon Lee, Boo-Hyun Ham
  • Patent number: 9711395
    Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Su Kim, Dong-Woon Park, Tae-Hoi Park, Yong-Kug Bae, Tae-Hwan Oh, Chang-Hoon Lee, Boo-Hyun Ham
  • Patent number: 9631908
    Abstract: Provided is an arrow, wherein by forming a diameter of a shaft, at a fore end of which a point is combined and at a rear end of which a nock is combined, in such a way that the diameter is reduced going from the fore end to the rear end, a center of weight is shifted toward the fore end so as to increase a hitting ratio of the arrow and a deflection deformation is reduced.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: April 25, 2017
    Assignee: WIN&WIN CO. LTD.
    Inventor: Dong Woon Park
  • Publication number: 20160245627
    Abstract: Provided is an arrow, wherein by forming a diameter of a shaft, at a fore end of which a point is combined and at a rear end of which a nock is combined, in such a way that the diameter is reduced going from the fore end to the rear end, a center of weight is shifted toward the fore end so as to increase a hitting ratio of the arrow and a deflection deformation is reduced.
    Type: Application
    Filed: February 24, 2015
    Publication date: August 25, 2016
    Inventor: Dong Woon PARK
  • Publication number: 20160035617
    Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 4, 2016
    Inventors: Jong-Su Kim, Dong-Woon Park, Tae-Hoi Park, Yong-Kug Bae, Tae-Hwan Oh, Chang-Hoon Lee, Boo-Hyun Ham
  • Patent number: 8871104
    Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-woon Park, Hyun-jong Lee, Si-young Choi, Yong-kug Bae
  • Patent number: 8691693
    Abstract: In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: April 8, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Sang-Jin Kim, Jong-Chan Shin, Yong-Kug Bae, Do-Hyoung Kim, Dong-Woon Park
  • Patent number: 8341561
    Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of a second pattern to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of a second pattern to image intensity on a first pattern. Neighboring regions of the first pattern are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the second pattern is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the first pattern and the term ? is the position of the assist.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-woon Park, Woo-sung Han, Seong-woon Choi, Jeong-ho Yeo
  • Publication number: 20120122286
    Abstract: In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 17, 2012
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Sang-Jin Kim, Jong-Chan Shin, Yong-Kug Bae, Do-Hyoung Kim, Dong-Woon Park
  • Publication number: 20120094492
    Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.
    Type: Application
    Filed: August 30, 2011
    Publication date: April 19, 2012
    Inventors: Dong-woon Park, Hyun-jong Lee, Si-young Choi, Yong-kug Kae
  • Patent number: 7954073
    Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of an assist feature to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of an assist feature to image intensity on a main feature. Neighboring regions of the main feature are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the assist feature is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the main feature and the term ? is the position of the assist.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: May 31, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-woon Park
  • Publication number: 20110119644
    Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of a second pattern to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of a second pattern to image intensity on a first pattern. Neighboring regions of the first pattern are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the second pattern is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the first pattern and the term ? is the position of the assist.
    Type: Application
    Filed: December 14, 2010
    Publication date: May 19, 2011
    Inventors: Dong-woon Park, Woo-sung Han, Seong-woon Choi, Jeong-ho Yeo
  • Patent number: 7937676
    Abstract: In positioning assist features on a photomask pattern to improve the image quality of the main features, the method includes deriving an h-function in a first process which represents a contribution of an assist feature with respect to image intensity at a main feature. In a continuation of the method, the position of the assist features are determined in a second process using the h-function derived in the first step. The assist features are then formed on the mask at the positions indicated. Also included is a computer readable medium having instructions for performing the h-function calculations, and the mask apparatus itself with both main and assist features positioned according to the h-function.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Woon Park
  • Patent number: 7877723
    Abstract: Provided are a method of fabricating a semiconductor and an apparatus using the method, and more particularly, a method of effectively arranging assist features on the mask and an apparatus using the method. The method of arranging mask patterns includes separately calculating contributions of an assist feature to image intensity at an optimal focus and at a defocus position and placing the assist feature at a position where the contribution of the assist feature to the image intensity is greater at the defocus position than at the optimal focus position.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: January 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Woon Park
  • Publication number: 20090013302
    Abstract: Methods and apparatus are disclosed that arrange mask patterns in response to the contribution of an assist feature to image intensity. In some methods of arranging mask patterns, a distribution of functions h(??x) is obtained which represents the contribution of an assist feature to image intensity on a main feature. Neighboring regions of the main feature are discretized into finite regions, and the distribution of the functions h(??x) is replaced with representative values h(x,?) of the discretized regions. A position of the assist feature is determined using polygonal regions having the same h(x,?). As described, the term x is the position of the main feature and the term ? is the position of the assist.
    Type: Application
    Filed: June 30, 2008
    Publication date: January 8, 2009
    Inventor: Dong-woon Park
  • Patent number: 7460210
    Abstract: An auto focus system includes a stage on which a substrate is mounted, light sources that irradiate the substrate with a plurality of focus beams directed towards the substrate at different angles, sensors that detect the focus beams reflected from the substrate, and a controller that determines the relative location of a surface of the substrate according to the locations at which the focus beams are detected by the sensors and positions the substrate accordingly. To this end, the controller performs calculations that are free from the influence of variations in the refractive index of the medium through which the focus beams propagate to the surface of the substrate. Therefore, the autofocus process is carried out with a high degree of precision.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Woon Park
  • Patent number: 7433048
    Abstract: Interferometer systems for measuring displacement include a displacement interferometer. This interferometer includes a displacement converter responsive to a measuring beam of light. The displacement converter is configured to transform movement thereof in a direction orthogonal to the measuring beam of light into a change in path length between a reflective surface of the displacement converter and the measuring beam of light. The displacement converter may include a transmission grating and a displacement mirror or a reflecting grating.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: October 7, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Woon Park
  • Publication number: 20080138719
    Abstract: Provided are a method of fabricating a semiconductor and an apparatus using the method, and more particularly, a method of effectively arranging assist features on the mask and an apparatus using the method. The method of arranging mask patterns includes separately calculating contributions of an assist feature to image intensity at an optimal focus and at a defocus position and placing the assist feature at a position where the contribution of the assist feature to the image intensity is greater at the defocus position than at the optimal focus position.
    Type: Application
    Filed: November 7, 2007
    Publication date: June 12, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Dong-Woon Park
  • Publication number: 20080138720
    Abstract: In positioning assist features on a photomask pattern to improve the image quality of the main features, the method includes deriving an h-function in a first process which represents a contribution of an assist feature with respect to image intensity at a main feature. In a continuation of the method, the position of the assist features are determined in a second process using the h-function derived in the first step. The assist features are then formed on the mask at the positions indicated. Also included is a computer readable medium having instructions for performing the h-function calculations, and the mask apparatus itself with both main and assist features positioned according to the h-function.
    Type: Application
    Filed: November 8, 2007
    Publication date: June 12, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Dong-Woon PARK