Patents by Inventor Dong-Yong Shin

Dong-Yong Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7460096
    Abstract: A display panel of a light emitting display device includes a plurality of pixel circuits disposed in a matrix format. At least one of the pixel circuits includes a light emitting element, a transistor, a capacitor, a first switch, and a second switch. The transistor has first, second, and third electrodes and is for outputting a current corresponding to a voltage applied between the first and second electrodes to the third electrode. The light emitting element is for emitting light corresponding to the current outputted by the transistor. The capacitor is coupled between the first and second electrodes of the transistor. The first switch is for transmitting image signals to the first electrode of the transistor in response to a select signal, and the second switch is for electrically coupling the light emitting element to the third electrode of the transistor in response to an emit signal.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: December 2, 2008
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Dong-Yong Shin
  • Patent number: 7342559
    Abstract: A demultiplexer using sample/hold circuits, and a display device using the same. The demultiplexer includes a first sample/hold circuit group with first and second sample/hold circuits for sampling the data current according to a first sampling order during a first interval, and programming the current corresponding to the sampled and stored data to at least two signal lines during a second interval. The demultiplexer further includes a second sample/hold circuit group with third and fourth sample/hold circuits for sampling the data current according to a second sampling order during a second interval, and programming the current corresponding to the sampled and stored data to the signal lines during a third interval. The first and second sampling orders in even the even frames are different from the sampling orders in the odd frames.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: March 11, 2008
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Dong-Yong Shin
  • Publication number: 20080030439
    Abstract: An organic light emitting display device includes data lines, selection scan lines, and emission scan lines for transmitting data signals, selection signals, and emission signals, respectively. Pixel circuits are arranged at regions defined by the data lines and the selection scan lines. A first scan driving unit outputs the emission signals. The first scan driving unit includes conversion circuits, each of the conversion circuits including conversion circuit transistors of an identical channel type. Each of the conversion circuits receives a first signal, a second signal, a third signal and a conversion circuit clock signal, and outputs a conversion output signal as a respective emission signal of the emission signals.
    Type: Application
    Filed: January 25, 2007
    Publication date: February 7, 2008
    Inventor: Dong-Yong Shin
  • Patent number: 7301533
    Abstract: A buffer circuit includes first to sixth transistors. The first transistor is coupled between a first power source and a first node, and has a gate for receiving a first signal having a first signal level. The second transistor is coupled between the first node and a second power source, and has a gate for receiving a second signal having a second signal level, which is an inverse of the first signal level. The third transistor has a gate coupled to the first node, and is coupled between the first power source and a second node. The fourth transistor is coupled between the second node and the second power source, and has a gate for receiving the first signal. The fifth transistor has a gate coupled to the second node, and is coupled between the first power source and an output end. The sixth transistor has a gate coupled to the first node, and is coupled between the output end and the second power source. In addition, a capacitance is formed between the gate of the sixth transistor and the output end.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: November 27, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Dong-Yong Shin, Bo-Yong Chung
  • Publication number: 20070262935
    Abstract: A data driver includes a shift register circuit configured to receive a first clock signal, a second clock signal, and a start signal, and to sequentially provide a sampling signal, a conversion circuit configured to receive the first clock signal, the second clock signal, and the sampling signal, and to sequentially provide a conversion signal, a sampling latch circuit configured to store data according to the sampling signal and the conversion signal, and a holding latch circuit configured to receive the data from the sampling latch circuit in response to first and second enable signals, and to provide a first data signal or a second data signal to data lines corresponding to the received data.
    Type: Application
    Filed: May 7, 2007
    Publication date: November 15, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070242000
    Abstract: A scan driving circuit includes a plurality of stages. Each stage receives three of four clocks that may be sequentially generated, receives and delays an input signal through an input terminal, and outputs an output signal through an output terminal. The input terminal of each stage is connected to the output terminal of a previous one of the stages. Each stage includes a transistor, a switch section, and a storage section. The transistor turns off/on a connection of the input terminal according to a second clock. The switch section transfers a first voltage to the output terminal according to a first clock and prevents the first voltage from being transferred to the output terminal according to the input signal. The storage section maintains a voltage of the output terminal for a predetermined time and transfers a voltage of a third clock to the output terminal according to the input signal.
    Type: Application
    Filed: January 23, 2007
    Publication date: October 18, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070242001
    Abstract: A scan driving circuit and an organic light emitting display using the same. The scan driving circuit includes stages that each includes: a switch for turning on/off a connection of the input terminal according to a first clock among a plurality of clocks, the first clock for inputting through a first clock terminal; a switch section for transferring a first voltage to the output terminal according to the first clock among the three clocks, and for preventing the first voltage from being transferred to the output terminal according to the input signal; and a storage section for maintaining a voltage of the output terminal for a predetermined time, and for transferring a voltage of a second clock among the three clocks to the output terminal according to the input signal, the second clock for inputting through the second clock terminal.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 18, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070240024
    Abstract: A scan driving circuit includes a first scan driver including a plurality of first units, the first units receiving an input signal or an output voltage of a previous first unit and first and second clock signals to output a scan signal, and a second scan driver having a plurality of second units, the second units receiving a plurality of scan signals output from respective ones of the first units, and at least one of the first and second clock signals, and outputting an emission control signal.
    Type: Application
    Filed: February 15, 2007
    Publication date: October 11, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070236421
    Abstract: A data driver including a shift register unit configured to receive a first clock signal, a second clock signal, and a start pulse, and to generate a sampling pulse, a sampling latch unit configured to receive and output bits and reversed bits of digital data, in correspondence with the sampling pulse, a holding latch unit configured to receive the bits and reversed bits output by the sampling latch unit, and to output the bits and reversed bits, in correspondence with a first enable signal and a second enable signal, and a digital-to-analog converter configured to receive the bits and reversed bits output by the holding latch unit and to generate an analog signal corresponding to values of the received bits and reversed bits.
    Type: Application
    Filed: January 19, 2007
    Publication date: October 11, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070229409
    Abstract: A scan driving circuit having a shift register unit with a plurality of stages, each stage includes an input terminal; an output terminal; first, second, and third clock terminals; a first transistor in communication with the input terminal and the second clock terminal, the first transistor configured to transfer the input signal according to a signal from the second clock terminal; a switch section in communication with the input terminal, the output terminal, and the first clock terminal, the switch section configured to receive the input signal from the first transistor and transfer a first exterior voltage signal to the output terminal according to the input signal and a signal from the first clock terminal; and a storage section configured to receive and store the input signal from the first transistor, and to transfer a signal from the third clock terminal to the output terminal according to the input signal.
    Type: Application
    Filed: January 19, 2007
    Publication date: October 4, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070229438
    Abstract: A data driver includes a shift register unit receiving a first clock signal, a second clock signal and a start pulse, and outputting a sampling pulse, a sampling latch unit storing data based on the sampling pulse and a charging signal, and a holding latch unit receiving data stored in the sampling latch unit based on a first enable signal and a second enable signal and supplying a first data signal or a second data signal to data lines based on the data received from the sampling latch unit.
    Type: Application
    Filed: February 15, 2007
    Publication date: October 4, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070216612
    Abstract: A data driving circuit including n channels, where n is an integer, the data driving circuit including a shift register unit receiving data during a first input period and a second input period, the shift register unit shifting and outputting the received data, a first latch unit receiving the data input during the first input period from the shift register unit, and simultaneously or substantially simultaneously outputting the data corresponding to the first input period, and a second latch unit receiving the data input during the second input period from the shift register unit, and simultaneously or substantially simultaneously outputting the data corresponding to the second input period.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 20, 2007
    Inventor: Dong Yong Shin
  • Publication number: 20070046593
    Abstract: An organic light emitting diode display device. A first capacitor is coupled between a gate of a first transistor and a first voltage source, and a second transistor is coupled between the gate of the first transistor and a second voltage source. A third transistor is coupled between the first voltage source and the gate of the first transistor, and a fourth transistor is coupled to a data line. A second capacitor stores the data voltage from the fourth transistor, and is for determining a gate-source voltage of the first transistor. The threshold voltage compensator compensates a threshold voltage of the third transistor together with the second capacitor, and the fifth transistor transmits a current of a drain of the first transistor to the organic light emitting diode. A photoelectric transformation element transmits a current corresponding to a light emitted by the organic light emitting diode to the second capacitor.
    Type: Application
    Filed: August 18, 2006
    Publication date: March 1, 2007
    Inventor: Dong-Yong Shin
  • Patent number: 7184065
    Abstract: The present invention is directed to a flat panel display whose brightness is adjusted based on inputted signals. In the flat panel display of the present invention, the pixels of the display panel are formed with capacitors for temporarily storing voltages corresponding to signals applied to the data lines responding to the scan signals applied to the scan lines and the pictures are displayed based on the voltages stored in the capacitors. Also, the display period controller controls a first period for storing a first voltage corresponding to a gray level of a picture to be displayed in the capacitors during one frame and a second period for storing a second voltage representing a black level in the capacitors, depending on a first signal representing a brightness level. Accordingly, the brightness of a variety of levels can be expressed without having to adjust a level of data voltage.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: February 27, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Dong-Yong Shin
  • Patent number: 7180493
    Abstract: Disclosed is a light emitting display device which provides a light emitting element for controlling the brightness according to the current to each pixel, such as an organic electroluminescent element, and a driving method thereof. The light emitting display device comprises transistors for forming a current mirror, and a pixel structure having first and second scan lines. A time to deselect the second scan signal that is supplied to the second scan line for writing display information on the pixel is earlier than a time to deselect the first scan signal that is supplied to the first scan line for selecting the pixel. As a result, reduction of brightness according to delay of the scan signal is prevented.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: February 20, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Dong-Yong Shin, Keum-Nam Kim
  • Patent number: 7129643
    Abstract: A pixel circuit of an organic EL display includes a driving transistor for transmitting a driving current to an organic EL element. A first capacitor is connected between a gate and a source of the driving transistor, and a second capacitor is connected between the gate thereof and a boosting scan line. A voltage corresponding to a data current from a data line is stored in the first capacitor in response to a select signal from a selecting scan line. The voltage level of the boosting scan line is changed so that the voltage of the first capacitor is changed by coupling of the first and second capacitors. The driving current corresponding to the changed voltage flows to the organic EL element to emit light. As a result, the current flowing to the organic EL element can be controlled using a large data current, and the influence of the parasitic capacitance components of the transistors or data lines can be minimized.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: October 31, 2006
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Dong-Yong Shin, Keum-Nam Kim, Do-Hyung Ryu
  • Patent number: 7081786
    Abstract: In a level shifter, first and second PMOS transistors are connected in series between first and second power sources for supplying first high level and low level voltages, respectively, and a capacitor is formed between a contact point of the first and second transistors and the second transistor's gate. A third PMOS transistor is diode-connected and connected between the first and second transistors' gates. When a second low level voltage is input to the first transistor's gate, a second high level voltage is output to the contact point according to an on resistance ratio of the first and second transistors. When a first high level voltage is input to the first transistor's gate, the second transistor is bootstrapped according to the voltage charged to the capacitor so that a first low level voltage is substantially output to the contact point.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: July 25, 2006
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Dong-Yong Shin
  • Publication number: 20060152459
    Abstract: A scan driver that selectively performs progressive scanning and interlaced scanning and a display using the same. The scan driver includes a shift register having a plurality of flip-flops arranged in series, an odd line selection unit having a plurality of NAND gates, and an even line selection unit having a plurality of NAND gates. In response to an odd line control signal and an even line control signal input to the odd line selection unit and the even line selection unit, respectively, the scan driver performs progressive scanning or interlaced scanning. The scan driver may also include a mode selection unit to selectively perform progressive scanning or interlaced scanning in response to a mode selection signal.
    Type: Application
    Filed: November 23, 2005
    Publication date: July 13, 2006
    Inventor: Dong-Yong Shin
  • Publication number: 20060156118
    Abstract: A scan driver and an organic light emitting display (OLED) for selectively performing progressive scanning and interlaced scanning. The scan driver includes a plurality of scan units. A scan unit generates an odd-number scan signal or an even-number scan signal and includes a flip-flop and a scan signal generator. The scan signal generator performs a logical operation on output signals from the flip-flop and a mode selection signal, and outputs a signal. A logical operation can be performed on the output signal of the scan unit and an impulse signal to form a scan signal and an emission control signal. The OLED, which selectively performs the progressive scanning and the interlaced scanning in response to a mode selection signal, includes an emission driver for outputting an emission control signal and a program driver for outputting a scan signal and a boost signal.
    Type: Application
    Filed: November 23, 2005
    Publication date: July 13, 2006
    Inventor: Dong-Yong Shin
  • Publication number: 20060152451
    Abstract: Disclosed is an image display apparatus having, in every pixel, a light-emitting element such as an organic electro-luminescence (EL) element of which the brightness is controlled by a current. The image display apparatus includes transistors that form a current mirror in the pixel and using a pixel structure having two scan lines, so as to select pixels of at least two rows simultaneously, distribute the current applied to the data line to the pixel for recording display information and the adjacent pixel, and record the display information on the pixel of no more than one row among the selected pixels. This drastically increases the current for driving the data line and decreases the size of the transistors that form the current mirror in the pixel.
    Type: Application
    Filed: March 10, 2006
    Publication date: July 13, 2006
    Inventor: Dong-Yong Shin