Abstract: A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

Abstract: A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

Abstract: A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

Abstract: A saturation adjusting apparatus for processing a pixel, which has three color components each having a value falling within a range defined by upper and lower extreme values, of a RGB color model includes an extreme value controller and a component adjuster. The extreme value controller determines maximum and minimum extreme value thresholds for ensuring that the values of the color components of the pixel after undergoing linear color correction processing based on a correction indicator fall within the range defined by the upper and lower extreme values. The component adjuster includes a decision-making unit for choosing the correction indicator from a group of values which includes the maximum extreme value threshold, the minimum extreme value threshold, and a saturation setting. The component adjuster further includes a color corrector for performing linear color correction processing on the three color components of the pixel using the correction indicator.

Abstract: A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.

Abstract: A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

Abstract: A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.

Abstract: The present invention discloses a flash memory device, an update method and program search method thereof. The flash memory device includes a read-only memory unit, a flash memory unit and a control unit. The read-only memory unit is used to store a first program code. The flash memory unit is used to store a second program code and digital data. The control unit coupled to the flash memory unit and the read-only memory unit is used to control the operation of the flash memory unit based on the first program code and the second program code. Hence, the upgrade time for the flash memory device can be shortened and the manufacture cost can be reduced.