Abstract: A MOS controlled thyristor device according to the concept of the present invention includes a substrate comprising a first surface and a second surface, which face each other, gate patterns disposed on the first surface, a cathode electrode configured to cover the gate patterns, and an anode electrode disposed on the second surface, The substrate includes a lower emitter layer having a first conductive type, a lower base layer having a second conductive type on the lower emitter layer, an upper base region provided in an upper portion of the lower emitter layer and having a first conductive type, wherein the upper base region is configured to expose a portion of a top surface of the lower base layer, an upper emitter region having a second conductive type and provided in an upper portion of the upper base region, a first doped region having a first conductive type and a second doped region surrounded by the first doped region and having a second conductive type, wherein the first and second doped regions are

Abstract: There is provided a battery system including: a controller; a main switch controlled by the controller to supply or cut off a voltage of a battery to a load; and a semiconductor pre-charger module including a semiconductor switch connected in parallel with the main switch and configured to supply or cut off the voltage of the battery to the load according to a control signal output from the controller, and a semiconductor switch driver configured to receive the control signal from the controller and output a single pulse signal for driving the semiconductor switch to turn on and off the semiconductor switch. Here, the semiconductor switch driver of the semiconductor pre-charger module includes an isolation element configured to electrically isolate the controller and the battery voltage, and the semiconductor switch of the semiconductor pre-charger module is a MOS-controlled thyristor (MCT).

Abstract: The present invention forms an off-FET channel having a uniform and short length by using a self-align process of a method of forming and recessing a spacer, thereby enhancing the current driving capability of an off-FET and the uniformity of a device operation.

Abstract: A MOS controlled thyristor device according to the concept of the present invention includes a substrate comprising a first surface and a second surface, which face each other, gate patterns disposed on the first surface, a cathode electrode configured to cover the gate patterns, and an anode electrode disposed on the second surface, The substrate includes a lower emitter layer having a first conductive type, a lower base layer having a second conductive type on the lower emitter layer, an upper base region provided in an upper portion of the lower emitter layer and having a first conductive type, wherein the upper base region is configured to expose a portion of a top surface of the lower base layer, an upper emitter region having a second conductive type and provided in an upper portion of the upper base region, a first doped region having a first conductive type and a second doped region surrounded by the first doped region and having a second conductive type, wherein the first and second doped regions are

Abstract: The apparatus for ESD test includes a micro-controller unit client, a low voltage supply configured to output a low voltage on the basis of control by the micro-controller unit, a high voltage supply configured to output a high voltage on the basis of control by the micro-controller unit, and an ESD generator configured to generate an ESD voltage for an ESD test of a device under test (DUT) by using the low voltage and the high voltage, on the basis of control by the micro-controller unit. The ESD generator is a semiconductor integrated circuit module where a charging semiconductor switch, a discharging semiconductor switch, a switch driving block controlling a switching operation of each of the charging semiconductor switch and the discharging semiconductor switch, and a plurality of passive elements connected to the charging semiconductor switch and the discharging semiconductor switch are implemented as package, for generating the ESD voltage.

Abstract: The present invention minimizes parasitic inductance at the time of packaging a semiconductor that requires high efficiency and high-speed switching driving. In implementing a semiconductor package composed of one or more switching devices and one or more diode devices, the present invention provides a flip-stack structure in which a switching device is mounted on an insulating substrate or a metal frame, a flat metal is bonded onto the switching device, and a diode device is flipped and stacked on the flat metal, and accordingly, the flat metal with a large area is used for connection between the devices and between the devices and the insulating substrate, thereby minimizing parasitic inductance generated at a time of semiconductor packaging and automating the entire process of the semiconductor packaging.

Abstract: The present invention forms an off-FET channel having a uniform and short length by using a self-align process of a method of forming and recessing a spacer, thereby enhancing the current driving capability of an off-FET and the uniformity of a device operation.

Abstract: A ceramic stacked semiconductor package and a method of packaging a ceramic stacked semiconductor is disclosed. Inner walls of junctions are formed between ceramic layers and a molding resin to have a non-uniform boundary shape (e.g., Z shape, an uneven shape, a zigzag shape, etc.) so that bonding areas and lengths of the molding resin and the ceramic layers are increased, and thus adhesion is improved and movement paths of moisture are increased, thereby improving anti-humidity property and reliability of the semiconductor package. Further, by arranging via-holes at different positions for each layer so as not to overlap each other between the layers, movement paths of moisture passing through the via-holes are increased, and thus the anti-humidity property and reliability of the stacked package are additionally improved.

Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.

Abstract: The present disclosure relates to a spherical wheel motor and a control system thereof, and more particularly, the spherical wheel motor and the control system include a spherical rotor and a stator surrounding an upper surface of the rotor. The rotor includes a spherical outer shell part, a first axial magnet extending in a horizontal direction in the outer shell part, a second axial magnet extending in the horizontal direction and facing the first axial magnet, and a rotary magnet belt provided in a form of a belt with the first axial magnet and the second axial magnet as a central axis. The rotary magnet belt includes a plurality of first rotary magnets and a plurality of second rotary magnets arranged alternately.

Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.

Abstract: The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as long term evolution (LTE). An electronic device is provided in a wireless communication system. The device comprises a plurality of antenna sets; a plurality of antenna elements configuring the plurality of antenna sets; an RF transceiver including a plurality of switches for selecting the plurality of antenna elements and a plurality of phase shifters for shifting the phase of a signal transmitted/received through the plurality of antenna elements; and a control unit for determining a beam forming direction and the phase of the signal by simultaneously controlling the plurality of switches and the plurality of phase shifters according to a beambook.

Abstract: The present disclosure relates to a spherical wheel motor and a control system thereof, and more particularly, the spherical wheel motor and the control system include a spherical rotor and a stator surrounding an upper surface of the rotor. The rotor includes a spherical outer shell part, a first axial magnet extending in a horizontal direction in the outer shell part, a second axial magnet extending in the horizontal direction and facing the first axial magnet, and a rotary magnet belt provided in a form of a belt with the first axial magnet and the second axial magnet as a central axis. The rotary magnet belt includes a plurality of first rotary magnets and a plurality of second rotary magnets arranged alternately.

Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.

Abstract: The present invention relates to a method and an apparatus for direct current offset calibration of a direct conversion receiver, a Direct Current (DC) offset calibration apparatus of a direct conversion receiver includes a plurality of variable gain amplifiers for amplifying an input signal based on a gain control value, a DC offset monitoring unit for monitoring a DC offset for an output signal of the plurality of variable gain amplifiers, a plurality of variable Digital to Analog Converters (DACs) for controlling a current applied to each of the plurality of variable gain amplifiers according to a current control code, and a DC offset cancellation unit for determining a current control code set which minimizes the DC offset value per preset gain control value, and thus the DC offset can be precisely cancelled without being affected by external factors such as a signal modulation method and heat and performance degradation of the receiver can be prevented.

Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.

Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.

Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.

Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.

Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.