Abstract: A wide bandgap semiconductor structure for an irradiation characteristic test includes a substrate with metal plates and a wide bandgap semiconductor part. The wide bandgap semiconductor part includes a gallium nitride layer, a barrier layer, P-type gallium nitride layers, source ohmic metal layers, and drain ohmic metal layers. The P-type gallium nitride layers are connected to a gate interconnection metal layer via gate metal layers and metal lead wires. A gate top metal layer is provided on the gate interconnection metal layer. Each source ohmic metal layer is provided with a source interconnection metal layer and source top metal layers. Each drain ohmic metal layer is provided with a drain interconnection metal layer and drain top metal layers. The wide bandgap semiconductor part is connected to the metal plates through the source top metal layers, the drain top metal layers, and the gate top metal layer.

Abstract: The present invention discloses a GaN HEMT device for irradiation damage detection which comprises a substrate layer, a gallium nitride layer, a barrier layer and a dielectric layer. A p-type gallium nitride layer is provided on the barrier layer. A drain and a source are respectively located at an inner side and an outer side of the p-type gallium nitride layer and provided on the gallium nitride layer. A Schottky metal layer is provided on the p-type gallium nitride layer. A first ohmic metal layer and a second ohmic metal layer are respectively located at an inner side and an outer side of the p-type gallium nitride layer and provided on the barrier layer. The second ohmic metal layer includes inner gear electrodes and outer gear electrodes, which are interdigital with each other.

Abstract: The present invention discloses a GaN HEMT transistor with impact energy release capability for use in aerospace irradiation environment and preparation method thereof. The transistor includes a substrate layer, a gallium nitride layer, a barrier layer, and a gate structure successively arranged from bottom to top. The gallium nitride layers on both sides of the barrier layer are respectively provided with a source electrode and a drain electrode on the top surface. The gate structure is located near the source electrode and includes a p-type gallium nitride layer, a dielectric layer, an Ohmic metal pillar, and a Schottky metal layer. The present invention solves the breakdown problem caused by the inability to release impact energy during the switching process by introducing an asymmetric multi-integrated gate structure.

Abstract: Disclosed are a double-sided solar cell and a preparation method therefor. The double-sided solar cell comprises: a silicon wafer having a PN junction, and a front first silicon oxide layer, a front second silicon oxide layer, a front first nitrogen-containing silicon compound layer, a front second nitrogen-containing silicon compound layer, and a front third silicon oxide layer that are located on one side of an N-type layer of the silicon wafer and are sequentially stacked along a direction away from the silicon wafer; and a passivation layer, a back silicon oxide layer, a back first nitrogen-containing silicon compound layer, and a back second nitrogen-containing silicon compound layer that are located on one side of a P-type layer of the silicon wafer and are sequentially stacked along the direction away from the silicon wafer.

Abstract: A method for upgrading a certificate of a POS terminal, a server, a POS terminal and a terminal device are provided, this method includes: performing a mutual authentication with the POS terminal when receiving a certificate upgrading request sent from the POS terminal; and encapsulating the certificate to be upgraded in a preset proprietary protocol format to obtain update data, using a session key to encrypt the update data to obtain a ciphertext and sending the ciphertext to the POS terminal, after the mutual authentication is passed. According to the present application, a problem that it is inconvenient to use the existing certificate update methods, much time needs to be consumed, and transportation cost is increased may be solved.

Abstract: A power measurement method and apparatus, and a storage medium and a program product are disclosed. The power measurement method may include: acquiring a signal power and a signal wavelength of a measurement signal transmitted by a base station under test; calculating an equivalent isotropic radiated power of the measurement signal according to the signal power and the signal wavelength; and calculating a total radiated power of a carrier signal of the base station under test according to the equivalent isotropic radiated power of the measurement signal, a preset target direction parameter and a preset power ratio factor.

Abstract: A field wheat stem tillering number extraction method, including: acquiring field wheat point clouds by means of a LiDAR, and extracting any row of wheat point clouds in a research area; projecting a Y axis to a plane, and retaining an X and Z axis; applying adaptive layering to obtain number of clusters of the wheat row; applying hierarchical clustering analysis to obtain tillering number of each wheat cluster; and further obtaining stem tillering number of the whole wheat row, so as to extract a field wheat stem tillering number. The feasibility of an algorithm is verified by comparing the wheat stem tillering number extracted by means of the method with an actually measured field stem tillering number, and the method realizes rapid, accurate and nondestructive extraction of a large-field crop stem tillering number and provides theoretical basis and technical support for extraction of the field wheat stem tillering number.

Abstract: The present invention discloses an in-situ testing system for semiconductor device in aerospace irradiation environment. The present invention includes a static testing unit, a static testing channel, a dynamic testing unit, a dynamic testing channel, and a channel switching control unit; the static testing unit is connected to the device under test through the static testing channel, and is used to output static testing signals and display the static testing data of the device under test; the dynamic testing unit is connected to the device under test through the dynamic testing channel, and is used to output dynamic testing signals and display the dynamic testing data of the device under test; the channel switching control unit is connected to the static testing channel and the dynamic testing channel, respectively. This invention can achieve static, dynamic, and degradation testing of third-generation semiconductor device in aerospace irradiation environment.

Abstract: The present invention discloses a novel silicon carbide-based lateral PN junction extreme ultraviolet detector with enhanced detection performance based on selective-area ion implantation, including an N-type ohmic contact lower electrode, an N-type substrate and a lightly-doped epitaxial layer which are connected sequentially from bottom to top, where the lightly-doped epitaxial layer is an N-type lightly-doped epitaxial layer or a P-type lightly-doped epitaxial layer; in a case that the lightly-doped epitaxial layer is an N-type or P-type lightly-doped epitaxial layer, a P-type or N-type well region is formed on the surface of the N-type or P-type lightly-doped epitaxial layer through the selective-area ion implantation, a P-type or N-type ohmic contact upper electrode is arranged on the P-type or N-type well region, and the P-type or N-type ohmic contact upper electrode is provided with a metal conductive electrode along its periphery.

Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a sliced low-resolution Z buffer (LRZ) that is communicatively coupled to each hardware slice of the plurality of hardware slices, and that comprises a plurality of LRZ regions. Each hardware slice is configured to store, in an LRZ region corresponding exclusively to the hardware slice among the plurality of LRZ regions, a pixel tile assigned to the hardware slice.

Abstract: The present invention discloses a novel silicon carbide-based lateral PN junction extreme ultraviolet detector with enhanced detection performance based on selective-area ion implantation, including an N-type ohmic contact lower electrode, an N-type substrate and a lightly-doped epitaxial layer which are connected sequentially from bottom to top, where the lightly-doped epitaxial layer is an N-type lightly-doped epitaxial layer or a P-type lightly-doped epitaxial layer; in a case that the lightly-doped epitaxial layer is an N-type or P-type lightly-doped epitaxial layer, a P-type or N-type well region is formed on the surface of the N-type or P-type lightly-doped epitaxial layer through the selective-area ion implantation, a P-type or N-type ohmic contact upper electrode is arranged on the P-type or N-type well region, and the P-type or N-type ohmic contact upper electrode is provided with a metal conductive electrode along its periphery.

Abstract: Disclosed are a double-sided solar cell and a preparation method therefor. The double-sided solar cell comprises: a silicon wafer having a PN junction, and a front first silicon oxide layer, a front second silicon oxide layer, a front first nitrogen-containing silicon compound layer, a front second nitrogen-containing silicon compound layer, and a front third silicon oxide layer that are located on one side of an N-type layer of the silicon wafer and are sequentially stacked along a direction away from the silicon wafer; and a passivation layer, a back silicon oxide layer, a back first nitrogen-containing silicon compound layer, and a back second nitrogen-containing silicon compound layer that are located on one side of a P-type layer of the silicon wafer and are sequentially stacked along the direction away from the silicon wafer.

Abstract: An The integrated waterproof seal connector has a metal snap-fit member, a plastic support member, a rubber tube, and a supporting tube member. The rubber tube has a first hollow structure portion, connected to a second hollow structure portion through a connecting portion. The supporting member tube is detachably disposed in the first hollow structure portion. The metal snap-fit member is detachably disposed in the plastic support member, and a press type clamping structure portion is arranged on an end of the metal snap-fit member and can be stuck to a wall of the plastic support member. The plastic support member is disposed in the second hollow structure portion. A first end of the second hollow structure portion is provided with a seal structure for sealing a connecting port of a device. A stuck structure protrudes from the first end of the second hollow structure portion.

Abstract: A method for upgrading a certificate of a POS terminal, a server, a POS terminal and a terminal device are provided, this method includes: performing a mutual authentication with the POS terminal when receiving a certificate upgrading request sent from the POS terminal; and encapsulating the certificate to be upgraded in a preset proprietary protocol format to obtain update data, using a session key to encrypt the update data to obtain a ciphertext and sending the ciphertext to the POS terminal, after the mutual authentication is passed. According to the present application, a problem that it is inconvenient to use the existing certificate update methods, much time needs to be consumed, and transportation cost is increased may be solved.

Abstract: Disclosed are a method, system and device for manufacturing a printed circuit board, and a computer storage medium. The method comprises: acquiring a printed circuit board to be manufactured which includes a via hole; acquiring shape information of the via hole; acquiring connection information of circuit layers in said printed circuit board; assembling preset conducting devices according to the connection information and the shape information, so as to obtain a target conducting device that matches the connection information and the shape information; guiding the target conducting device into the via hole to obtain a conducting printed circuit board; and connecting the conducting printed circuit board to obtain a target printed circuit board, wherein the types of the preset conducting devices comprise a metal conducting device, a non-metal conducting device and a semi-metal conducting device.

Abstract: Methods are provided for forming an electrode. The method can comprise thermally reducing GeO2 powders at a reducing temperature of 300° C. to 600° C. to produce Ge particles; mixing the Ge particles with an organic binder and a carbon source; and pressing the Ge particles with the binder and the carbon source to form the electrode. Electrodes are also provided that include a plurality of microparticles comprising Ge grains, an organic binder, and a carbon source, wherein the Ge grains comprise cubic Ge and are bonded together to form Ge particles, and wherein the Ge grains define nanopores within the electrode.

Abstract: Described herein are methods and devices that allow the generation of [F-18]triflyl fluoride and other [F-18] sulfonyl fluorides (such as [F-18]tosyl fluoride) in a manner that is suitable for radiosynthesis of F-18 labeled radiopharmaceuticals using currently available synthesis modules.

Abstract: Depth information can be used to assist with image processing functionality, such as image stabilization and blur reduction. In at least some embodiments, depth information obtained from stereo imaging or distance sensing, for example, can be used to determine a foreground object and background object(s) for an image or frame of video. The foreground object then can be located in later frames of video or subsequent images. Small offsets of the foreground object can be determined, and the offset accounted for by adjusting the subsequent frames or images. Such an approach provides image stabilization for at least a foreground object, while providing simplified processing and reduce power consumption. Similarly processes can be used to reduce blur for an identified foreground object in a series of images, where the blur of the identified object is analyzed.

Abstract: A method includes: providing a mixture including at least one alkyl tosylate and a Grignard reagent; and reacting the at least one alkyl tosylate with the Grignard reagent in a C—C coupling reaction mechanism to form a branched aliphatic alcohol.

Abstract: Disclosed are a method, system and device for manufacturing a printed circuit board, and a computer storage medium. The method comprises: acquiring a printed circuit board to be manufactured which includes a via hole; acquiring shape information of the via hole; acquiring connection information of circuit layers in said printed circuit board; assembling preset conducting devices according to the connection information and the shape information, so as to obtain a target conducting device that matches the connection information and the shape information; guiding the target conducting device into the via hole to obtain a conducting printed circuit board; and connecting the conducting printed circuit board to obtain a target printed circuit board, wherein the types of the preset conducting devices comprise a metal conducting device, a non-metal conducting device and a semi-metal conducting device.