Abstract: The present disclosure discloses a display driving apparatus. The display driving apparatus of the present disclosure may be configured to drive a source signal in a state optimized for a panel load of a display panel.

Abstract: A method for controlling an electric heater of a vehicular heating, ventilation, and air conditioning (HVAC) system includes turning on the electric heater; determining whether an ambient air temperature of a vehicle is higher than or equal to a threshold ambient air temperature, and a battery temperature is lower than or equal to a threshold battery temperature; determining whether battery efficiency is lower than or equal to threshold efficiency when the ambient air temperature of the vehicle is higher than or equal to the threshold ambient air temperature, and the battery temperature is lower than or equal to the threshold battery temperature; and turning off the electric heater when the battery efficiency is lower than or equal to the threshold efficiency, wherein the electric heater is configured to receive electric energy from the battery.

Abstract: The present invention relates to a polyester resin. The polyester resin is useful for bottles, sheets, multilayer sheets, stretched films and fiber applications due to excellent heat resistance and transparency, and in particular, the polyester resin has little deterioration of physical properties such as yellowing, etc., during processing. A process for making the polyester resin includes an esterification reaction between a dicarboxylic acid that includes terephthalic acid and a diol that includes isosorbide in the presence of a catalyst, followed by a polycondensation reaction on a product of the esterification reaction. In some embodiments, an initial mixing ratio of the dicarboxylic acid and the diol is between 1:1.02 and 1:1.04.

Abstract: Disclosed is a high voltage output device having a serial-parallel stack structure of capacitors. The high voltage output device includes a substrate includes a capacitor element and a pillar structure provided on an upper surface of the substrate. The substrate includes a first electrode and a second electrode, which have different potentials from each other. The capacitor element is connected to at least one of the first electrode and the second electrode.

Abstract: A display device includes a via insulating layer on a substrate; a first electrode on the via insulating layer; a pixel defining layer including an inclined region on the first electrode and including a first opening exposing a portion of the first electrode, and a flat region at a side of the inclined region and in contact with the via insulating layer; a light emitting layer on the portion of the first electrode exposed by the first opening; organic particles on the flat region of the pixel defining layer; an encapsulation layer covering the pixel defining layer, the light emitting layer, and the organic particles, and including a first layer, a second layer, and a third layer; and a first light blocking layer on the third layer of the encapsulation layer to overlap the flat region of the pixel defining layer and form a second opening.

Abstract: The present invention relates to: a method for screening an antifungal agent, the method measuring the amount or activity of proteins involved in passage through the brain-blood barrier; a biomarker composition for diagnosing meningoencephalitis or cryptococcosis; a diagnostic kit including said composition; and a therapeutic pharmaceutical composition including an inhibitor for the protein.

Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: Provided is a method of identifying a candidate gene for a genetic disease includes obtaining a disease network, disease-gene association information, and a gene network, obtaining a single nucleotide polymorphism (SNP) network based on intra-relation data between a plurality of SNPs, and inter-relation data between genes and SNPs, creating a disease-gene-SNP multilayered network based on the disease network, the disease-gene association information, the gene network, the SNP network, and the interrelation data between genes and SNPs, and identifying a candidate gene for a genetic disease using the multilayered network.

Abstract: Disclosed is a memory device. A memory device according to an embodiment of the present invention includes a memory device including a substrate; and a lower electrode, seed layer, lower synthetic antiferromagnetic layer, magnetic tunnel junction, upper synthetic antiferromagnetic layer, and upper electrode that are laminated on the substrate, wherein the magnetic tunnel junction includes a lower pinned layer, lower tunnel barrier layer, lower free layer, separation layer, upper free layer, upper tunnel barrier layer and upper pinned layer that are sequentially laminated.

Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) device according to the present embodiment comprises: an STT-MRAM memory array which includes a data storage unit for storing data, a defect area address storage unit for storing an address of a defect area, and a spare area for storing data of a failed area; and a bypass determination unit which includes a volatile information storage element for storing the address of the defect area, stored in the defect area address storage unit and provided thereto, and when memory array access occurs, compares an access address with the address of the defect area stored in the volatile information storage element and causes the memory array access to bypass to the spare area.

Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: Disclosed is a memory device. A memory device according to an embodiment of the present invention includes a memory device including a substrate; and a lower electrode, seed layer, lower synthetic antiferromagnetic layer, magnetic tunnel junction, upper synthetic antiferromagnetic layer, and upper electrode that are laminated on the substrate, wherein the magnetic tunnel junction includes a lower pinned layer, lower tunnel barrier layer, lower free layer, separation layer, upper free layer, upper tunnel barrier layer and upper pinned layer that are sequentially laminated.

Abstract: An input device configured for a vehicle in which a display area and an input area are realized as a single body so that a degree of freedom of design may be improved, may include a body having a display area and an input area, and a touch assembly disposed under the input area, and one or more input elements and one or more indicators are formed in the input area.

Abstract: A method of low-latency direct data access to non-volatile flash memory in at least one NVMe-oF SSD device connected over Ethernet. The method includes transmitting, from a low-latency direct access (LL-DAX) block storage software layer at a host, a remote direct memory access (RDMA) write request to the flash memory. The RDMA write request includes data, a storage address, a length of a data transfer operation, and an operation code. The method also includes receiving, at the host, an RDMA level acknowledgement indicating that the data has been persisted to the flash memory. The method also includes transmitting, from the LL-DAX block storage software layer, an RDMA read request to the flash memory that includes a storage address, a length of a data transfer, and an operation code. The method also includes receiving, at the host, data packets from the flash memory corresponding to the RDMA read request.

Abstract: A storage device and a refresh method thereof are provided. The storage device includes at least a first processing core configured to operate by receiving a first power from a host, a second processing core separate from the first processing core, at least a first three-dimensional (3D) flash memory, a power module and a retention management module supplied with a second power from the power module when the first power is not supplied from the host. The retention management module is configured to refresh a part of the first 3D flash memory using the second processing core. The retention management module is configured to be woken up at intervals of a first period to refresh the part of the first 3D flash memory.

Abstract: A characteristic data pre-processing system includes a data acquisition device that collects characteristic data including first cell distribution data defined according to first default read levels, and second cell distribution data defined according to second default read levels, a data pre-processing apparatus that merges the first cell distribution data and the second cell distribution data according crop ranges to generate training data, wherein the crop ranges are defined according to the first default levels and the second default levels, and a database that stores the training data communicated from the data pre-processing apparatus.

Abstract: An operating method of a storage device includes a controller: receiving read data from a non-volatile memory; measuring a plurality of threshold voltage distributions respectively corresponding to a plurality of memory units of the non-volatile memory, based on the received read data; measuring a distribution variation between the plurality of memory units, based on the measured plurality of threshold voltage distributions; dynamically determining operation parameters for the non-volatile memory, based on the measured distribution variation; and transmitting, to the non-volatile memory, an operate command, an address, and at least one operation parameter corresponding to the address.

Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) device according to the present embodiment comprises: an STT-MRAM memory array which includes a data storage unit for storing data, a defect area address storage unit for storing an address of a defect area, and a spare area for storing data of a failed area; and a bypass determination unit which includes a volatile information storage element for storing the address of the defect area, stored in the defect area address storage unit and provided thereto, and when memory array access occurs, compares an access address with the address of the defect area stored in the volatile information storage element and causes the memory array access to bypass to the spare area.