Patents by Inventor Dong-Ho Ahn
Dong-Ho Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240126890Abstract: An apparatus of verifying a software integrity of a vehicle controller and a method thereof includes a communication device that provides a communication interface with a software management system, and a controller which is configured to obtain first verification data of the vehicle controller from the software management system, obtains second verification data from the vehicle controller, and verifies an integrity of software loaded in the vehicle controller based on the obtained first verification data and the obtained second verification data.Type: ApplicationFiled: April 19, 2023Publication date: April 18, 2024Applicants: HYUNDAI MOTOR COMPANY, Kia CorporationInventors: Hye Ryun LEE, Kyung Tae NOH, Min Ho HEO, Sug Woo SHIN, Duk Won HONG, Dong Jun AHN
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Patent number: 11933688Abstract: Provided is a portable apparatus for measuring a manipulation force. The apparatus includes a manipulation force measurement unit configured to measure a manipulation force applied on a manipulated part in a first direction of pushing forward or pulling backward and measure a manipulation force in a second direction of moving toward left or right, and a controller configured to process the measured manipulation force to generate manipulation force information over time.Type: GrantFiled: August 3, 2022Date of Patent: March 19, 2024Assignees: Hyundai Motor Company, Kia CorporationInventors: Sang Seo Ahn, Jong Jun Kim, Dong Ho Yang
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Publication number: 20240073416Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, Universily-lndustry Cooperation Group of Kyung Hee UniversityInventors: Sung Chang LIM, Ha Hyun LEE, Se Yoon JEONG, Hui Yong KIM, Suk Hee CHO, Jong Ho KIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Dong Gyu SIM, Seoung Jun OH, Gwang Hoon PARK, Sea Nae PARK, Chan Woong JEON
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Patent number: 11912924Abstract: The present invention provides a composition for antifreezing including a gold (Au) nanostructure in which at least a portion thereof is concave, thereby it is possible to increase a survival rate of cells due to having excellent effect of inhibiting ice recrystallization when cryopreservation of the cells, and maintain a texture of food even when using in the freezing of food.Type: GrantFiled: December 3, 2019Date of Patent: February 27, 2024Assignee: Korea University Research and Business FoundationInventors: Dong June Ahn, Sang Yup Lee, Yong Ho Cho
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Publication number: 20230310543Abstract: A a composition for prevention or treatment of a Staphylococcus aureus infectious disease and a composition for prevention or treatment of a thrombotic disorder caused by Staphylococcus aureus infection are disclosed. Cell lysis by 11 toxins of Staphylococcus aureus can be thoroughly inhibited by using the cross-reactivity of antibodies against Staphylococcus aureus toxins, even with a minimal combination of antigens. The composition can be used as an effective therapeutic composition that can comprehensively remove or alleviate comprehensive pathological conditions caused by infection, away from piecemeal amelioration of individual symptoms caused by Staphylococcus aureus infection, by inducing opsonophagocytosis and effectively controlling blood coagulation in infected individuals.Type: ApplicationFiled: September 8, 2021Publication date: October 5, 2023Applicants: CLIPSBNC CO., LTD., PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATIONInventors: Bok Luel LEE, Dong Ho AHN
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Patent number: 10714685Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.Type: GrantFiled: August 1, 2019Date of Patent: July 14, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Min Kyu Yang, Seong Geon Park, Dong Jun Seong, Dong Ho Ahn, Jung Moo Lee, Seol Choi, Hideki Horii
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Patent number: 10636968Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.Type: GrantFiled: February 15, 2019Date of Patent: April 28, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hideki Horii, Seong-Geon Park, Dong-Ho Ahn, Jung-Moo Lee
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Patent number: 10546894Abstract: A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.Type: GrantFiled: December 20, 2018Date of Patent: January 28, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Zhe Wu, Dong-ho Ahn, Hideki Horii, Soon-oh Park, Jeong-hee Park, Jin-woo Lee, Dong-jun Seong, Seol Choi
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Publication number: 20190355905Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.Type: ApplicationFiled: August 1, 2019Publication date: November 21, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Min Kyu YANG, Seong Geon PARK, Dong Jun SEONG, Dong Ho AHN, Jung Moo LEE, Seol CHOI, Hideki HORN
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Patent number: 10403818Abstract: Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.Type: GrantFiled: January 9, 2017Date of Patent: September 3, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Min Kyu Yang, Seong Geon Park, Dong Jun Seong, Dong Ho Ahn, Jung Moo Lee, Seol Choi, Hideki Horii
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Patent number: 10403681Abstract: A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below, [GeASeBTeC](1-U)[X]U??(1) where 0.20?A?0.40, 0.40?B?0.70, 0.05?C?0.25, A+B+C=1, 0.0?U?0.20, and X is at least one selected from boron (B), carbon (C), nitrogen (N), oxygen (O), phosphorus (P), or sulfur (S).Type: GrantFiled: December 6, 2017Date of Patent: September 3, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-ho Ahn, Zhe Wu, Soon-oh Park, Hideki Horii
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Patent number: 10388867Abstract: A variable resistance memory device including a selection pattern; an intermediate electrode contacting a first surface of the selection pattern; a variable resistance pattern on an opposite side of the intermediate electrode relative to the selection pattern; and a first electrode contacting a second surface of the selection pattern and including a n-type semiconductor material, the second surface of the selection pattern being opposite the first surface thereof.Type: GrantFiled: October 17, 2016Date of Patent: August 20, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Zhe Wu, Soon-Oh Park, Jeong-Hee Park, Dong-Ho Ahn, Hideki Horii
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Publication number: 20190189920Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.Type: ApplicationFiled: February 15, 2019Publication date: June 20, 2019Inventors: Hideki Horii, Seong-Geon Park, Dong-Ho Ahn, Jung-Moo Lee
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Publication number: 20190148456Abstract: A memory device includes a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction; a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions; and a plurality of memory cells being respectively arranged between the corresponding word and bit lines. Each of the memory cells includes a selection device layer, and a variable resistance layer, wherein the selection device layer includes a chalcogenide switching material having a composition according to a particular chemical formula.Type: ApplicationFiled: December 20, 2018Publication date: May 16, 2019Inventors: Zhe Wu, Dong-ho Ahn, Hideki Horii, Soon-oh Park, Jeong-hee Park, Jin-woo Lee, Dong-jun Seong, Seol Choi
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Patent number: 10236444Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.Type: GrantFiled: February 14, 2017Date of Patent: March 19, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hideki Horii, Seong-Geon Park, Dong-Ho Ahn, Jung-Moo Lee
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Patent number: 10224371Abstract: A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below, [GeXSiY(AsaTe1-a)Z](1-U)[N]U??(1) (where 0.05?X?0.1, 0.15?Y?0.25, 0.7?Z?0.8, X+Y+Z=1, 0.45?a?0.6, and 0.08?U?0.2).Type: GrantFiled: February 1, 2017Date of Patent: March 5, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Zhe Wu, Dong-ho Ahn, Hideki Horii, Soon-oh Park, Jeong-hee Park, Jin-woo Lee, Dong-jun Seong, Seol Choi
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Patent number: 10186552Abstract: A variable resistance memory device may include: a first electrode layer; a selection device layer on the first electrode layer, the selection device layer including a chalcogenide switching material consisting essentially of germanium (Ge), selenium (Se), and antimony (Sb), wherein a content of the Ge is less than a content of the Se based on an atomic weight; a second electrode layer on the selection device layer; a variable resistance layer on the second electrode layer, the variable resistance layer including a chalcogenide material; and a third electrode layer on the variable resistance layer.Type: GrantFiled: March 1, 2017Date of Patent: January 22, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seol Choi, Hideki Horii, Dong-ho Ahn, Seong-geon Park, Dong-jun Seong, Min-kyu Yang, Jung-moo Lee
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Patent number: 10128312Abstract: There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.Type: GrantFiled: April 12, 2017Date of Patent: November 13, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Zhe Wu, Jeong Hee Park, Dong Ho Ahn, Jin Woo Lee, Hee Ju Shin, Ja Bin Lee
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Publication number: 20180277601Abstract: A memory device is provided. The memory device includes a variable resistance layer. A selection device layer is electrically connected to the variable resistance layer. The selection device layer includes a chalcogenide switching material having a composition according to chemical formula 1 below, [GeASeBTeC](1-U)[X]U??(1) where 0.20?A?0.40, 0.40?B?0.70, 0.05?C?0.25, A+B+C=1, 0.0?U?0.20, and X is at least one selected from boron (B), carbon (C), nitrogen (N), oxygen (O), phosphorus (P), or sulfur (S).Type: ApplicationFiled: December 6, 2017Publication date: September 27, 2018Inventors: Dong-ho Ahn, Zhe Wu, Soon-oh Park, Hideki Horii
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Patent number: 10017743Abstract: The present invention relates to a novel MDCK-derived cell line capable of being suspension-cultured in a protein-free medium and a method for proliferating a virus using the MDCK-derived cell line to produce a vaccine. The novel MDCK-derived cell line exhibits high and uniform productivity for various viruses, while causing less viral antigenic variations with low tumorigenicity, and thus can be useful in producing viruses used for vaccines.Type: GrantFiled: June 3, 2014Date of Patent: July 10, 2018Assignee: MOGAM BIOTECHNOLOGY INSTITUTEInventors: Mihee Hwang, Kukjin Park, Duckhyang Shin, Hyeon Lee, Sooin Kim, Eunyoung Cho, Misuk Kim, Dong Ho Ahn