Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.

Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.

Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.

Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: In one example, a semiconductor device comprises a substrate, a first electronic component on a top side of the substrate, a second electronic component on the top side of the substrate, an encapsulant on the top side of the substrate, contacting a lateral side of the first electronic component and a lateral side of the second electronic component, a conformal shield on a top side of the encapsulant over the first electronic component and having a side shield contacting a lateral side of the encapsulant, and a compartment wall between the first electronic component and the second electronic component and contacting the conformal shield to define a compartment containing the first electronic component and excluding the second electronic component. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a substrate, a first electronic component on a top side of the substrate, a second electronic component on the top side of the substrate, an encapsulant on the top side of the substrate, contacting a lateral side of the first electronic component and a lateral side of the second electronic component, a conformal shield on a top side of the encapsulant over the first electronic component and having a side shield contacting a lateral side of the encapsulant, and a compartment wall between the first electronic component and the second electronic component and contacting the conformal shield to define a compartment containing the first electronic component and excluding the second electronic component. Other examples and related methods are also disclosed herein.

Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.

Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.