Patents by Inventor Dongmin Chen

Dongmin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240302578
    Abstract: A lens with an adjustable surface profile can include an actuatable layer, an optical layer, and at least one actuator. The optical layer can include a deformable polymer, and the actuatable layer can have a surface profile that is configured to be adjustable using the at least one actuator. The optical layer, meanwhile, can be configured to deform when the at least one actuator actuates the actuatable layer.
    Type: Application
    Filed: January 16, 2024
    Publication date: September 12, 2024
    Inventors: Dongmin Yang, Yi Zhou, Yizhi Xiong, Fei Liu, Abhishek Dhanda, Michael Okincha, Linsen Bie, Honghong Peng, Zhaochun Yu, Lidu Huang, Shaomin Xiong, Gabriel Molina, Pablo Castillo Canales, Peng Chen, Danni Luo, Eddie Alex Azuma
  • Publication number: 20240297972
    Abstract: An augmented reality apparatus includes a plurality of transmission lines, plural signal-generating circuits, at least one additional transmission line, at least one signal-processing circuit, a multiplexer having a plurality of inputs and at least one output, a plurality of matching networks, and an additional matching network coupling the additional transmission line to the output of the multiplexer. Example AR/VR devices include a camera configured to receive light from the external environment of the device and to provide a camera signal. The camera may include a surface variable lens including a support layer, an optical layer, a membrane layer, and an actuator. A computer-implemented method for anatomical electromyography test design includes identifying a wearable device having a frame including a plurality of electrodes, and calibrating the plurality of electrodes.
    Type: Application
    Filed: November 21, 2023
    Publication date: September 5, 2024
    Inventors: Hanqiao Zhang, Patrick Codd, Dongmin Yang, Yi Zhou, Yizhi Xiong, Fei Liu, Abhishek Dhanda, Michael Okincha, Linsen Bie, Honghong Peng, Zhaochun Yu, Lidu Huang, Shaomin Xiong, Gabriel Molina, Pablo Castillo Canales, Peng Chen, Danni Luo, Eddie Alex Azuma, Kong Boon Yeap, Dana Jensen, Cameron O'Neill, Guangwu Duan, Raffael Engleitner, David Xu, Yibo Liu, Ankur Verma, Lei Zhao, Yuecheng Li, Dawei Wang
  • Patent number: 10003020
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: June 19, 2018
    Assignee: 4D-S PTY, LTD
    Inventor: Dongmin Chen
  • Publication number: 20170141303
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.
    Type: Application
    Filed: December 2, 2016
    Publication date: May 18, 2017
    Inventor: Dongmin Chen
  • Patent number: 9634247
    Abstract: A resistive memory device is disclosed. The memory device comprises one or more metal oxide layers. An oxygen vacancy or ion concentrations of the one or more metal oxide layer is controlled in the formation and the operation of the memory device to provide robust memory operation.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 25, 2017
    Assignee: 4D-S LTD.
    Inventors: Dongmin Chen, Lee Cleveland, Seshubabu Desu, Kurt Pfluger, Jean Yang-Scharlotta
  • Patent number: 9520559
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: December 13, 2016
    Assignee: 4D-S PTY, LTD
    Inventor: Dongmin Chen
  • Publication number: 20160118581
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 28, 2016
    Inventor: Dongmin Chen
  • Patent number: 9293201
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: March 22, 2016
    Assignee: 4D-S PTY, LTD
    Inventor: Dongmin Chen
  • Patent number: 9006878
    Abstract: A multilayered integrated optical and circuit device. The device has a first substrate comprising at least one integrated circuit chip thereon, which has a cell region and a peripheral region. Preferably, the peripheral region has a bonding pad region, which has one or more bonding pads and an antistiction region surrounding each of the one or more bonding pads. The device has a second substrate with at least one or more deflection devices thereon coupled to the first substrate. At least one or more bonding pads are exposed on the first substrate. The device has a transparent member overlying the second substrate while forming a cavity region to allow the one or more deflection devices to move within a portion of the cavity region to form a sandwich structure including at least a portion of the first substrate, a portion of the second substrate, and a portion of the transparent member.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: April 14, 2015
    Assignee: Miradia Inc.
    Inventors: Xiao “Charles” Yang, Dongmin Chen, Philip Chen
  • Publication number: 20140169070
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicants: 4DS, Inc
    Inventor: Dongmin Chen
  • Publication number: 20140117298
    Abstract: A resistive memory device is disclosed. The memory device comprises one or mo re metal oxide layers. An oxygen vacancy or ion concentrations of the one or more metal oxide layer is controlled in the formation and the operation of the memory device to provide robust memory operation.
    Type: Application
    Filed: March 15, 2013
    Publication date: May 1, 2014
    Applicant: 4DS, Inc.
    Inventors: Dongmin Chen, Lee Cleveland, Seshubabu Desu, Kurt Pfluger, Jean Yang-Scharlotta
  • Patent number: 8709891
    Abstract: Memory devices and methods for providing the memory devices are provided. The memory devices utilize multiple metal oxide layers. The methods for providing the memory devices can include providing a transistor; producing a capacitor that includes metal layers and metal oxide layers; connecting the capacitor to a side of the transistor; and providing a wordline, bitline, and driveline through connection with the transistor or the capacitor.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: April 29, 2014
    Assignee: 4D-S Ltd.
    Inventors: Zhida Lan, Dongmin Chen
  • Patent number: 8698120
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: April 15, 2014
    Assignee: 4D-S Pty. Ltd
    Inventor: Dongmin Chen
  • Publication number: 20130279236
    Abstract: Memory devices and methods for providing the memory devices are provided. The memory devices utilize multiple metal oxide layers. The methods for providing the memory devices can include providing a transistor; producing a capacitor that includes metal layers and metal oxide layers; connecting the capacitor to a side of the transistor; and providing a wordline, bitline, and driveline through connection with the transistor or the capacitor.
    Type: Application
    Filed: June 14, 2013
    Publication date: October 24, 2013
    Applicant: 4D-S, LTD.
    Inventors: Zhida Lan, Dongmin Chen
  • Patent number: 8530258
    Abstract: A resonator includes a CMOS substrate having a first electrode and a second electrode. The CMOS substrate is configured to provide one or more control signals to the first electrode. The resonator also includes a resonator structure including a silicon material layer. The resonator structure is coupled to the CMOS substrate and configured to resonate in response to the one or more control signals.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: September 10, 2013
    Assignee: Miradia Inc.
    Inventors: Xiao Yang, Dongmin Chen, Ye Wang, Justin Payne, Yuxiang Wang, Wook Ji
  • Patent number: 8530259
    Abstract: A method for fabricating a micro electromechanical device includes providing a first substrate including control circuitry. The first substrate has a top surface and a bottom surface. The method also includes forming an insulating layer on the top surface of the first substrate, removing a first portion of the insulating layer so as to form a plurality of standoff structures, and bonding a second substrate to the first substrate. The method further includes thinning the second substrate to a predetermined thickness and forming a plurality of trenches in the second substrate. Each of the plurality of trenches extends to the top surface of the first substrate. Moreover, the method includes filling at least a portion of each of the plurality of trenches with a conductive material, forming the micro electromechanical device in the second substrate, and bonding a third substrate to the second substrate.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: September 10, 2013
    Assignee: Miradia Inc.
    Inventors: Dongmin Chen, Justin Payne, Li-Tien Tseng
  • Patent number: 8424343
    Abstract: Light-absorbing glass frit material is used to seal an opening in a device or a plurality of devices in a batch process. The glass frit material is applied and then irradiated with light having a wavelength absorbed by the glass frit material so that the glass frit ball undergoes a glassy transition and forms a seal. When sealing an opening in a device, the glass frit material may be applied as a spherical ball such that the spherical ball covers the opening. The volume of the spherical ball may be selected to determine the final shape of the seal.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: April 23, 2013
    Assignee: MIRADIA, Inc.
    Inventors: Dongmin Chen, Matthew William Bellis
  • Patent number: 8378345
    Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: February 19, 2013
    Assignee: 4D-S Pty, Ltd
    Inventor: Dongmin Chen
  • Patent number: 8361331
    Abstract: A MEMS mirror for a laser printing application includes providing a CMOS substrate including a pair of electrodes, and providing a reflecting mirror moveable over the substrate and the electrodes. Voltages applied to the electrodes create an electrostatic force causing an end of the mirror to be attracted to the substrate. A precise position of the mirror can be detected and controlled by sensing a change in capacitance between the mirror ends and the underlying electrodes.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: January 29, 2013
    Assignee: Miradia Inc.
    Inventors: Xiao Yang, William Spencer Worley, III, Dongmin Chen, Ye Wang
  • Patent number: 8288851
    Abstract: A system for hermetically sealing devices includes a substrate, which includes a plurality of individual chips. Each of the chips includes a plurality of devices and each of the chips are arranged in a spatial manner as a first array. The system also includes a transparent member of a predetermined thickness, which includes a plurality of recessed regions arranged in a spatial manner as a second array and each of the recessed regions are bordered by a standoff region. The substrate and the transparent member are aligned in a manner to couple each of the plurality of recessed regions to a respective one of said plurality of chips. Each of the chips within one of the respective recessed regions is hermetically sealed by contacting the standoff region of the transparent member to the plurality of first street regions and second street regions using at least a bonding process to isolate each of the chips within one of the recessed regions.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: October 16, 2012
    Assignee: Miradia Inc.
    Inventors: Xiao Yang, Dongmin Chen