Abstract: This invention relates to a positive photosensitive resin composition that includes a siloxane copolymer of two kinds of reactive silane compounds with specific structures wherein residual impurities such as unreacted monomers and catalysts are minimized, and a UV absorber including one or more kinds of phenol hydroxyl groups capable of crosslinking and an alkoxy group. Accordingly, the resin composition exhibits excellent performances such as sensitivity, resolution, and degree of planarization, and also has excellent weatherability and UV absorbance, thereby providing excellent panel reliability.

Abstract: A wound-type electrode assembly including a first electrode, a separator, and a second electrode, where the first electrode may include a substrate, an active material layer on at least one surface of the substrate, a first functional layer spaced apart from the active material layer by a predetermined distance and on the substrate, a finishing tape attached to an upper surface of the first functional layer, one surface of the substrate exposed between the active material layer and the first functional layer, and an upper surface of the active material layer.

Abstract: Disclosed are an electrode for a rechargeable lithium battery, an electrode assembly including the same, and a rechargeable lithium battery, the electrode including an uncoated portion; an active material layer; and an endothermic ceramic layer which are provided sequentially from one end to the other end on the same single surface of the current collector.

Abstract: An electrode assembly for a rechargeable battery according may include a stacked-type electrode assembly in which positive electrodes, separators, and negative electrodes are alternately stacked, wherein the positive electrode on an outermost side of the stacked-type electrode assembly, the positive electrode includes a substrate having an electrode uncoated region and an electrode active region, an active material layer formed on one surface of the substrate in the electrode active region, and a ceramic layer formed on the opposite surface of the substrate in the electrode active region, and the one surface is relatively adjacent to the center and faces the negative electrode.

Abstract: An electrode includes: a substrate including an electrode uncoated portion and an electrode active portion; a functional layer on the substrate; and an active material layer on the functional layer of the electrode active portion. The functional layer includes a first portion overlapping the electrode active portion and a second portion extending from the first portion to the electrode uncoated portion. The electrode is for a rechargeable battery.

Abstract: An electrode assembly includes a first short-circuit member, an anode on the first short-circuit member, the anode including a first substrate and a first active material layer on the first substrate, a separator on the anode, a cathode on the separator, the cathode including a second substrate and a second active material layer on the second substrate, and a second short-circuit member on the cathode, wherein each of the first short-circuit member and the second short-circuit member includes a first metal foil, an insulating layer, and a second metal foil that are on top of each other.

Abstract: The present disclosure relates to a dielectric composite-based power reduction device. The power reduction device of the present disclosure is a dielectric composite-based power reduction device capable of high-efficiency power reduction via parallel connection to an input power supply. The power reduction is achieved by reactive power reduction based on a capacitor bank principle, a harmonic wave reduction by inductance, and an increase in active power efficiency. Disclosed are a composite electrode structure capable of achieving all of those, and an improvement in a performance based on a development of the composite.

Abstract: A method of driving a display by communicating with a controller through a first channel and a second channel includes; generating recovery data from a signal received through the first channel during a frame data period, detecting a vertical blank period between frame data periods, checking a training trigger event history during the vertical blank period, and during the vertical blank period, transmitting a training request direct to the first channel through the second channel when there is a training trigger event history.

Abstract: A method of recovering a clock and data from an input data signal including an embedded clock, the method including generating a recovery clock signal from the input data signal based on a first window signal; detecting a unit interval corresponding to one bit of the input data signal based on the recovery clock signal; delaying a signal synchronized with the recovery clock signal based on the unit interval; and generating the first window signal based on the delayed signal.

Abstract: A method of driving a display by communicating with a controller through a first channel and a second channel includes; generating recovery data from a signal received through the first channel during a frame data period, detecting a vertical blank period between frame data periods, checking a training trigger event history during the vertical blank period, and during the vertical blank period, transmitting a training request direct to the first channel through the second channel when there is a training trigger event history.

Abstract: A method of recovering a clock and data from an input data signal including an embedded clock, the method including generating a recovery clock signal from the input data signal based on a first window signal; detecting a unit interval corresponding to one bit of the input data signal based on the recovery clock signal; delaying a signal synchronized with the recovery clock signal based on the unit interval; and generating the first window signal based on the delayed signal.

Abstract: A display device includes a data generator configured to generate a clock-embedded data packet, and a controller configured to control operation of the data generator. The data packet comprises a header, a first symbol comprising address information therein, and a second symbol not comprising address information, and the header comprises address information of the first symbol.

Abstract: The display driving circuit including a type detector for receiving a data packet including a 2-bit embedded signal, in which a clock signal embedded in a data signal, and outputting a first reference clock or a second reference clock different from the first reference clock according to a type of the data packet, a window generator for receiving multi-phase clocks and providing to the type detector a first window reference and a second window reference different from the first window reference to be used in determining the type of the data packet, a buffer for delaying the first reference clock by a first interval and delaying the second reference clock by a second interval different from the first interval, and a multiplexer for multiplexing the delayed first and second reference clocks and outputting a multiplexed reference clock may be provided.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A display device includes a data generator configured to generate a clock-embedded data packet, and a controller configured to control operation of the data generator. The data packet comprises a header, a first symbol comprising address information therein, and a second symbol not comprising address information, and the header comprises address information of the first symbol.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A timing controller, a source driver, and a display driver integrated circuit (DDI) having improved test efficiency and a method of operating the DDI are provided. The timing controller includes a code generation unit for generating a first code from display data, a protocol encoder for generating a data sequence including the display data and the first code, and a transmission unit for providing the data sequence to a source driver through a link.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.