Patents by Inventor DongSam Park

DongSam Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110272807
    Abstract: An integrated circuit packaging system includes: a carrier, having a carrier top side and a carrier bottom side, without an active device attached to the carrier bottom side; an interconnect over the carrier; and a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation, and with the carrier top side partially exposed with the cavity.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 10, 2011
    Inventors: DongSam Park, Dongjin Jung
  • Publication number: 20110254172
    Abstract: A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings, the through vias coplanar with the bottom exposed surface of the encapsulant and coplanar with the top exposed surface of the encapsulant.
    Type: Application
    Filed: June 27, 2011
    Publication date: October 20, 2011
    Inventors: DongSam Park, JoungIn Yang
  • Patent number: 8008787
    Abstract: An integrated circuit package system includes: mounting an integrated circuit die over a carrier; attaching a delamination prevention structure over the integrated circuit die; and encapsulating the delamination prevention structure and the integrated circuit die.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: August 30, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DongSam Park, A Leam Choi, Keon Teak Kang
  • Patent number: 7989950
    Abstract: An integrated circuit packaging system includes: attaching a carrier, having a carrier top side and a carrier bottom side, and an interconnect without an active device attached to the carrier bottom side; and forming a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation and with the carrier top side partially exposed with the cavity.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: August 2, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DongSam Park, Dongjin Jung
  • Patent number: 7986048
    Abstract: A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: July 26, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DongSam Park, JoungIn Yang
  • Patent number: 7863100
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an intermediate package embedded link trace, the intermediate package embedded link trace being encapsulated in an intermediate package mold compound; forming a cap package having a cap interposer; and connecting the intermediate package to the cap package and the base package using the intermediate package embedded link trace.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: January 4, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Joungln Yang, Dongjin Jung, DongSam Park
  • Publication number: 20100237482
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an intermediate package embedded link trace, the intermediate package embedded link trace being encapsulated in an intermediate package mold compound; forming a cap package having a cap interposer; and connecting the intermediate package to the cap package and the base package using the intermediate package embedded link trace.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 23, 2010
    Inventors: JoungIn Yang, Dongjin Jung, DongSam Park
  • Publication number: 20100207262
    Abstract: A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 19, 2010
    Inventors: DongSam Park, JoungIn Yang
  • Publication number: 20100038781
    Abstract: An integrated circuit packaging system includes: attaching a carrier, having a carrier top side and a carrier bottom side, and an interconnect without an active device attached to the carrier bottom side; and forming a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation and with the carrier top side partially exposed with the cavity.
    Type: Application
    Filed: August 14, 2008
    Publication date: February 18, 2010
    Inventors: DongSam Park, Dongjin Jung
  • Publication number: 20090152547
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a substrate; mounting a base integrated circuit on the substrate; forming a leadframe interposer, over the base integrated circuit, by: providing a metal sheet, mounting an integrated circuit die on the metal sheet, injecting a molded package body on the integrated circuit die and the metal sheet, and forming a ball pad, a bond finger, or a combination thereof from the metal sheet that is not protected by the molded package body; coupling a circuit package on the ball pad; and forming a component package on the substrate, the base integrated circuit, and the leadframe interposer.
    Type: Application
    Filed: December 4, 2008
    Publication date: June 18, 2009
    Inventors: DongSam Park, YoungSik Cho, Sang-Ho Lee
  • Publication number: 20090072377
    Abstract: An integrated circuit package system includes: mounting an integrated circuit die over a carrier; attaching a delamination prevention structure over the integrated circuit die; and encapsulating the delamination prevention structure and the integrated circuit die.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: DongSam Park, A Leam Choi, Keon Teak Kang
  • Patent number: 7482203
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: January 27, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Sungmin Song, Choong Bin Yim, SeongMin Lee, Jaehyun Lim, Joungin Yang, DongSam Park
  • Publication number: 20080105965
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.
    Type: Application
    Filed: December 26, 2007
    Publication date: May 8, 2008
    Applicant: STATS ChipPAC Ltd.
    Inventors: Sungmin Song, Choong Bin Yim, Seongmin Lee, Jaehyun Lim, Joungin Yang, Dongsam Park
  • Patent number: 7312519
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: December 25, 2007
    Assignee: Stats Chippac Ltd.
    Inventors: Sungmin Song, Choong Bin Yim, Seongmin Lee, Jaehyun Lim, Joungin Yang, Dongsam Park
  • Patent number: 7298037
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit spacer package including a mold compound with a recess provided therein, stacking the first integrated circuit spacer package on an integrated circuit die on a substrate with the recess positioned therebetween, and attaching a first electrical interconnect extending from the recess and connected between the integrated circuit die and the substrate.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: November 20, 2007
    Assignee: Stats Chippac Ltd.
    Inventors: Choong Bin Yim, Sungmin Song, SeongMin Lee, Jaehyun Lim, Joungin Yang, DongSam Park
  • Publication number: 20070216006
    Abstract: A integrated circuit package on package system is provided including providing a base substrate having a base stackable connection, attaching a base integrated circuit on the base substrate, forming a stackable package including the base integrated circuit encapsulated with the base stackable connection partially exposed, and attaching a bottom package on the stackable package.
    Type: Application
    Filed: March 17, 2006
    Publication date: September 20, 2007
    Applicant: STATS ChipPAC Ltd.
    Inventors: DongSam Park, Choong Bin Yim, In Sang Yoon
  • Publication number: 20070194423
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit spacer package including a mold compound with a recess provided therein, stacking the first integrated circuit spacer package on an integrated circuit die on a substrate with the recess positioned therebetween, and attaching a first electrical interconnect extending from the recess and connected between the integrated circuit die and the substrate.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 23, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Choong Bin Yim, Sungmin Song, SeongMin Lee, Jaehyun Lim, Joungin Yang, DongSam Park
  • Publication number: 20070158810
    Abstract: A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.
    Type: Application
    Filed: January 12, 2006
    Publication date: July 12, 2007
    Applicant: STATS ChipPAC Ltd.
    Inventors: Sungmin Song, Choong Yim, Seongmin Lee, Jaehyun Lim, Joungin Yang, Dongsam Park