Patents by Inventor Doug Carmean

Doug Carmean has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Distribution of tasks among asymmetric processing elements
    Patent number: 11366511
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 21, 2022
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 11054890
    Abstract: Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed. In one embodiment, one or more asymmetric processing elements are power managed to migrate processes or threads among a plurality of processing elements according to the performance and power needs of the system.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20210089113
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Applicant: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 10437320
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: October 8, 2019
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 10409360
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: September 10, 2019
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 10386915
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: August 20, 2019
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Systems and methods for migrating processes among asymmetrical processing cores
    Patent number: 9939882
    Abstract: Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed. In one embodiment, one or more asymmetric processing elements are power managed to migrate processes or threads among a plurality of processing elements according to the performance and power needs of the system.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: April 10, 2018
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 9910483
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 9870046
    Abstract: Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: January 16, 2018
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of tasks among asymmetric processing elements
    Patent number: 9760162
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: September 12, 2017
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Distribution of Tasks Among Asymmetric Processing Elements
    Publication number: 20170024001
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Application
    Filed: September 2, 2016
    Publication date: January 26, 2017
    Inventors: HERBERT HUM, ERIC SPRANGLE, DOUG CARMEAN, RAJESH KUMAR
  • Distribution of Tasks Among Asymmetric Processing Elements
    Publication number: 20160370852
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Application
    Filed: September 2, 2016
    Publication date: December 22, 2016
    Inventors: HERBERT HUM, ERIC SPRANGLE, DOUG CARMEAN, RAJESH KUMAR
  • Distribution of Tasks Among Asymmetric Processing Elements
    Publication number: 20160370851
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Application
    Filed: September 2, 2016
    Publication date: December 22, 2016
    Inventors: HERBERT HUM, ERIC SPRANGLE, DOUG CARMEAN, RAJESH KUMAR
  • Distribution of tasks among asymmetric processing elements
    Patent number: 8930722
    Abstract: Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed. In one embodiment, one or more asymmetric processing elements are power managed to migrate processes or threads among a plurality of processing elements according to the performance and power needs of the system.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: January 6, 2015
    Assignee: Intel Corporation
    Inventors: Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20140130058
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20140019656
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores.
    Type: Application
    Filed: September 20, 2013
    Publication date: January 16, 2014
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • Migrating execution of thread between cores of different instruction set architecture in multi-core processor and transitioning each core to respective on / off power state
    Patent number: 8615647
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: December 24, 2013
    Assignee: Intel Corporation
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20130318374
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20130318373
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar
  • DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS
    Publication number: 20130314425
    Abstract: Techniques to control power and processing among a plurality of asymmetric cores.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Inventors: Herbert Hum, Eric Sprangle, Doug Carmean, Rajesh Kumar