Abstract: A configurable transmit/receive multiplexed coil monitoring (CMCM) device is provided having a plurality of dual function I/O connections connectable to a plurality of coils. The CMCM device is configurable to selectively drive AC transmit signals to any of the plurality of dual function I/O connections, while simultaneously monitoring voltage and phase information received as AC voltages at the dual function I/O connections in a multiplexed manner. The CMCM device is further configured such that while a selected I/O connection is selected to receive voltage and phase information from a particular I/O connection, no AC transmit signal can be driven to that selected particular I/O connection. Embodiments may include a multiplexer and one or more receive circuits configured to receive and digitalize received AC signals for processing by a digital signal processor.

Abstract: A configurable transmit/receive multiplexed coil monitoring (CMCM) device is provided having a plurality of dual function I/O connections connectable to a plurality of coils. The CMCM device is configurable to selectively drive AC transmit signals to any of the plurality of dual function I/O connections, while simultaneously monitoring voltage and phase information received as AC voltages at the dual function I/O connections in a multiplexed manner. The CMCM device is further configured such that while a selected I/O connection is selected to receive voltage and phase information from a particular I/O connection, no AC transmit signal can be driven to that selected particular I/O connection. Embodiments may include a multiplexer and one or more receive circuits configured to receive and digitalize received AC signals for processing by a digital signal processor.

Abstract: An LCD controller includes a charge pump circuit for generating a charge voltage responsive to an external voltage and a clock signal. An oscillator generates the clock signal responsive to at least one bias voltage. The oscillator has a high power mode of operation and a low power mode of operation. Bias circuitry for applies the at least one bias voltage to the oscillator. The at least one bias voltage is applied to the oscillator from an external source in the high power mode of operation and the at least one bias voltage is applied to the oscillator from a source within the oscillator in the low power mode of operation. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an LCD display responsive to the charge voltage.

Abstract: An LCD controller includes a charge pump for generating a charge voltage responsive to an external voltage and a clock signal. The controller further includes an oscillator for generating the clock signal responsive to an oscillator control signal. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an associated LCD display. A loop control circuit within the LCD controller monitors an LCD driver voltage from the LCD driver voltage circuit and generates the oscillator control signal responsive thereto to enable and disable the oscillator.

Abstract: An LCD controller includes a charge pump circuit for generating a charge voltage responsive to an external voltage and a clock signal. An oscillator generates the clock signal responsive to at least one bias voltage. The oscillator has a high power mode of operation and a low power mode of operation. Bias circuitry for applies the at least one bias voltage to the oscillator. The at least one bias voltage is applied to the oscillator from an external source in the high power mode of operation and the at least one bias voltage is applied to the oscillator from a source within the oscillator in the low power mode of operation. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an LCD display responsive to the charge voltage.

Abstract: An apparatus includes a multiplexed liquid crystal display (LCD) controller. The LCD controller is adapted to operate in at least first and second phases of operation. The LCD controller is adapted to drive a plurality of signal lines to a first set of voltages during the first phase of operation and to a second set of voltages during the second phase of operation. The LCD controller is further adapted to couple to a node at least some of the plurality of signal lines between the first and second phases of operation.

Abstract: An LCD controller includes at least one I/O pad for providing an LCD drive voltage in an LCD mode of operation. I/O pad logic drives the at least one I/O pad responsive to a provided bias voltage. Voltage selection logic selects a higher voltage between an LCD drive voltage and an externally provided system voltage as a first voltage. Bias voltage logic selects one of the system voltage or the first voltage as the bias voltage for the I/O pad logic. The system voltage is selected as the bias voltage for the I/O pad logic in a non-LCD mode of operation for the I/O pad and the first voltage is selected for the bias voltage for the I/O pad logic in the LCD mode of operation for the I/O pad.

Abstract: An output pad control logic comprises an output buffer including a plurality of transistors connected to drive signals for an output pad. Each of the plurality of transistors includes an n-well. An n-well generator connects a first voltage to the n-wells of the plurality of transistors of the output buffer in a first mode of operation when a system rail voltage exceeds a pad voltage applied to the output pad. The n-well generator connects the pad voltage to the n-wells of the plurality of transistors of the output buffer in a second mode of operation when the pad voltage applied to the output buffer exceeds the system rail voltage. A switching circuit is responsive to at least one control signal to connect the system rail voltage as the first voltage when the output pad is not driving an LCD display and to connect a larger of the system rail voltage and an LCD drive voltage as the first voltage when the output pad is driving the LCD display.

Abstract: A LINBUS communication network comprises a microcontroller unit containing processing circuitry for performing predefined digital processing functions. LINBUS communication network hardware is located within the microcontroller unit for digitally communicating with an off-chip LINBUS device for transmitting data thereto and receiving data therefrom. A plurality of LINBUS communication network interfaces selectively connects one of a plurality of groups of slave devices to the LINBUS network communications hardware.

Abstract: An LCD controller includes a charge pump for generating a charge voltage responsive to an external voltage and a clock signal. The controller further includes an oscillator for generating the clock signal responsive to an oscillator control signal. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an associated LCD display. A loop control circuit within the LCD controller monitors an LCD driver voltage from the LCD driver voltage circuit and generates the oscillator control signal responsive thereto to enable and disable the oscillator.

Abstract: An LCD controller includes a charge pump circuit for generating a charge voltage responsive to an external voltage and a clock signal. An oscillator generates the clock signal responsive to at least one bias voltage. The oscillator has a high power mode of operation and a low power mode of operation. Bias circuitry for applies the at least one bias voltage to the oscillator. The at least one bias voltage is applied to the oscillator from an external source in the high power mode of operation and the at least one bias voltage is applied to the oscillator from a source within the oscillator in the low power mode of operation. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an LCD display responsive to the charge voltage.

Abstract: An LCD controller includes a charge pump circuit for generating a charge voltage responsive to an external voltage and a clock signal. An oscillator generates the clock signal responsive to at least one bias voltage. The oscillator has a high power mode of operation and a low power mode of operation. Bias circuitry for applies the at least one bias voltage to the oscillator. The at least one bias voltage is applied to the oscillator from an external source in the high power mode of operation and the at least one bias voltage is applied to the oscillator from a source within the oscillator in the low power mode of operation. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an LCD display responsive to the charge voltage.

Abstract: An LCD controller includes at least one I/O pad for providing an LCD drive voltage in an LCD mode of operation. I/O pad logic drives the at least one I/O pad responsive to a provided bias voltage. Voltage selection logic selects a higher voltage between an LCD drive voltage and an externally provided system voltage as a first voltage. Bias voltage logic selects one of the system voltage or the first voltage as the bias voltage for the I/O pad logic. The system voltage is selected as the bias voltage for the I/O pad logic in a non-LCD mode of operation for the I/O pad and the first voltage is selected for the bias voltage for the I/O pad logic in the LCD mode of operation for the I/O pad.

Abstract: Charge pump circuitry comprises a voltage for generating a first regulated voltage. A low drop out regulator generates a second regulated voltage responsive to the first regulated voltage. A charge pump voltage generation circuit generates a voltage. First and second resistor strings are responsive to the generated voltage. The first resistor string provides a first plurality of bias voltages to an LCD responsive to the voltage in a first mode of operation and the second resistor string provides faster charging and discharging of the connected LCD elements responsive to a second mode of operation.

Abstract: An integrated circuit comprises a host interface control block for providing a connection between the integrated circuit and a master controller device. The integrated circuit further includes a plurality of I/O pins. A capacitive touch sense circuitry enables detection of actuation of at least one capacitor switch of a capacitive sensor array connected to at least a portion of the plurality of I/O pins. An LCD controller drives at least one LCD connected to at least a portion of the plurality of I/O pins. The integrated circuit, responsive to signals received from the master controller device over the host interface control block, may be configured to monitor outputs from the capacitive sensor array in a first mode of operation. In a second mode of operation, the capacitive sensor array may be configured to drive at least one LCD. Finally, in a third mode of operation, the integrated circuit may be configured to both monitor outputs of the capacitive sensor array and drive the at least one LCD.

Abstract: A capacitive touch sensor circuitry comprises an interface for interconnecting with a plurality of I/O pins that connect to rows and columns of a capacitive sensor array. Monitoring circuitry, responsive to inputs from the plurality of I/O pins, determines when a capacitive switch in the capacitive sensor array has been actuated and stores an indication of the actuation of the capacitive switch. The monitoring circuitry then generates an interrupt responsive to the determined actuation. A control engine controls a manner in which the monitoring circuitry monitors the plurality of I/O pins. The control engine and the monitoring circuitry may be configured to monitor the plurality of I/O pins in a plurality of operating modes.

Abstract: A LINBUS communication network comprises a microcontroller unit containing processing circuitry for performing predefined digital processing functions. LINBUS communication network hardware is located within the microcontroller unit for digitally communicating with an off-chip LINBUS device for transmitting data thereto and receiving data therefrom. A plurality of LINBUS communication network interfaces selectively connects one of a plurality of groups of slave devices to the LINBUS network communications hardware.

Abstract: A system and method for an anti-pinch powered window system includes a window and a mechanical drive mechanism for raising and lowering the window. An electric motor drives the mechanical drive mechanism responsive to a command. A microcontroller unit generates the command responsive to a measured load current of the electric motor. A command to change direction of the window is generated responsive to a determination that the measured load current has exceeded a variable threshold level indicating that the window has stopped due to an obstruction. The variable threshold level is determined by the load current data stored within a memory.

Abstract: The integrated system on a chip with LINBUS network communication capabilities includes processing circuitry for performing predefined digital processing functionalities on the chip. A free running clock circuit generates a temperature compensated clock that does not require a synch signal from external to the chip. A LINBUS network communications interface digitally communicates with off-chip LINBUS devices. Communication between said on-chip LINBUS communications interface and the off-chip LINBUS devices is affected without clock recovery. The LINBUS network communication interface has a time base derived from the temperature compensated clock which is independent of any timing information in the input data received during a receive operation. The temperature compensated clock further provides an on-chip time reference for both the processing circuitry and the LINBUS network communications interface.

Abstract: A system and method for an anti-pinch powered window system includes a window and a mechanical drive mechanism for raising and lowering the window. An electric motor drives the mechanical drive mechanism responsive to a command. A microcontroller unit generates the command responsive to a measured load current of the electric motor. A command to change direction of the window is generated responsive to a determination that the measured load current has exceeded a variable threshold level indicating that the window has stopped due to an obstruction. The variable threshold level is determined by the load current data stored within a memory.