Abstract: An apparatus includes a first auxiliary switch connected to a positive connection of a switching leg of a DC-to-DC converter. The switching leg includes a first main switch and a second main switch connected at a main switch midpoint. A second auxiliary switch is connected between a negative connection of the switching leg and the first auxiliary switch. A connection point between the first and second auxiliary switches is an auxiliary midpoint. An auxiliary inductor connects the auxiliary midpoint and the main switch midpoint. The main switch midpoint is also connected to other converter elements. The first and second main switches include a first capacitance a second capacitance. A switch regulation module regulates the first and second auxiliary switches to control current in the auxiliary inductor to provide or remove charge from the first and second capacitances to induce zero voltage switching for the first and second main switches.

Abstract: An apparatus includes a voltage regulation module that controls output voltage of a bidirectional DC to DC converter to an output voltage reference over an output current range between a positive power reference and a negative power reference. A positive power regulation module controls output power of the converter to the positive power reference over a positive constant power range between the output voltage reference and a positive output current reference. A negative power regulation module controls output power of the converter to the negative power reference over a constant power range between the output voltage reference and a maximum negative power limit, and a constant current module limits output current to a positive output current reference in a range between a minimum output voltage and output power of the converter reaching the positive power reference.

Abstract: A modular dc-dc boost converter system is provided that can substantially improve efficiency over a wide range of input and output voltages. The system includes three modules: a buck module, a boost module, and a dc transformer module. These modules are interconnected such that the system output voltage is equal to the sum of the output voltages of adc-dc converter module and a dc transformer module. Depending on the operating point, one or more modules may operate in passthrough mode, leading to substantially reduced ac losses. The required capacitor size and the transistor voltage ratings are also substantially reduced, relative to a conventional single dc-dc boost converter operating at the same input and output voltages.

Abstract: For battery control, an apparatus includes a shared bus and a plurality of isolated direct current (DC) to DC bypass converters. Each bypass converter is associated with one battery unit. Inputs of each bypass converter are in parallel electrical communication with the associated battery unit. Outputs of each bypass converter are in parallel electrical communication with the shared bus. Each bypass converter estimates a battery state for each battery unit and controls the battery state to a reference state.

Abstract: An architecture is described for digital multi-phase modulators (MPM) that leads to an efficient, high performance hardware realization. The combined modulator, switching phases and output filter can be viewed as a multi-level digital to analog converter with high power output, or a power D/A, and concepts used in D/A converters are leveraged to achieve high performance and hardware efficiency. The modulator can be split into three functional blocks including a decoder that determines how many phases are on at any time, a selector that determines which phases are on at any time, and a single high resolution module that is time shared among all phases. The resulting architecture scales favorably with a large number of phases, fs, facilitates fast update rates of the input command well above the single phase switching frequency and is compatible with a wide range of known DPWM techniques for the LSB module and resolution-enhancement techniques such as dithering or ?-? modulation.

Abstract: An exemplary extended switched-mode controller is provided for controlling the switching of a switched-mode power converter. This exemplary extended switched-mode controller further comprises a standard switched-mode controller and an auxiliary controller configured to receive standard switch control signals from the switched-mode controller and to (1) pass the standard switch control signals to the switched-mode power converter during non-transient operation, and (2) provide auxiliary switch control signals to the switched-mode power converter during transient operation instead of the standard switch control signals. The auxiliary controller is further configured to determine when to provide the auxiliary switch control signals and to determine what control signals to provide at least partially based on an auxiliary feedback input signal comprising at least one of: sensed converter voltages, converter currents, and an error signal.

Abstract: A system and method is disclosed for providing multi-point calibration of an adaptive voltage scaling (AVS) system. A plurality of Reference Calibration Codes (RCCs) within a multi-point calibration table is provided. Each code is associated with one of the clock frequencies of the adaptive voltage scaling (AVS) system. The present invention provides multi-point calibration by calibrating a Reference Calibration Code (RCC) for each operating point (clock frequency) of the adaptive voltage scaling (AVS) system.

Abstract: A digital PFC (DPFC) control approach that requires no input voltage sensing or current loop compensation is described. The approach can provide stable, low-harmonic operation over a universal input voltage range and load ranging from high-load operation in continuous conduction mode down to near-zero load. A fast voltage loop can also be incorporated into a DPFC controller to provide additional control of the power stage. A controller can be based on low-resolution DPWM and A/D converters, can be implemented without microcontroller or DSP programming, and is well suited for simple, low-cost integrated-circuit realizations.

Abstract: A hybrid digital pulse width modulator (DPWM) with digital delay-locked loops (DLLs) is provided. In this implementation, the digital pulse-width-modulator is synthesizable and includes a digital delay-locked loop around a delay-line to achieve constant frequency clocked operation. In this implementation, the resolution of the modulator is consistent over a wide range of process or temperature variations. The DPWM may implement trailing-edge, leading-edge, triangular, or phase-shift modulation. In an implementation suitable for DC-DC converters with synchronous rectifiers, for example, the DPWM may include two or more outputs for programmable dead-times. In another implementation, a digital pulse-width-modulator with a digital phase-locked loop is also provided.

Abstract: A digital controller configured to inject a signal into a digital feedback path that facilitates regulation of a power converter and measure the corresponding phase, gain, or frequency. The digital controller may also include an adaptive tuning controller for adjusting power converter operating attributes based in part on the measurements. In an exemplary embodiment, the adaptive tuning controller uses the phase, gain, and/or frequency measurements to adjust the digital feedback signal. In an exemplary embodiment, the adaptive tuning controller compares the operating measurements with desired values and generates adjusted operating attributes. In accordance with an exemplary embodiment, the monitoring and adjusting of the digital feedback signal occurs while the digital controller is regulating a power signal in the power converter.

Abstract: A digital current-mode controller for a DC-DC converter is disclosed. The controller comprises a digital current reference; and a current loop compensator adapted to receive a digital current error signal derived from a digital current sample sensed from the DC-DC converter and the digital current reference and to generate a duty-cycle command, wherein the current loop compensator comprises a low-pass filter that is used in generating the duty-cycle command. A DC-DC regulator comprising a digital current-mode controller and a method of controlling a DC-DC converter are also disclosed.

Abstract: A digital controller configured to inject a signal into a digital feedback path that facilitates regulation of a power converter and measure the corresponding phase, gain, or frequency. The digital controller may also include an adaptive tuning controller for adjusting power converter operating attributes based in part on the measurements. In an exemplary embodiment, the adaptive tuning controller uses the phase, gain, and/or frequency measurements to adjust the digital feedback signal. In an exemplary embodiment, the adaptive tuning controller compares the operating measurements with desired values and generates adjusted operating attributes. In accordance with an exemplary embodiment, the monitoring and adjusting of the digital feedback signal occurs while the digital controller is regulating a power signal in the power converter.

Abstract: An exemplary extended switched-mode controller is provided for controlling the switching of a switched-mode power converter. This exemplary extended switched-mode controller further comprises a standard switched-mode controller and an auxiliary controller configured to receive standard switch control signals from the switched-mode controller and to (1) pass the standard switch control signals to the switched-mode power converter during non-transient operation, and (2) provide auxiliary switch control signals to the switched-mode power converter during transient operation instead of the standard switch control signals. The auxiliary controller is further configured to determine when to provide the auxiliary switch control signals and to determine what control signals to provide at least partially based on an auxiliary feedback input signal comprising at least one of: sensed converter voltages, converter currents, and an error signal.

Abstract: A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.

Abstract: A system and method is disclosed for providing multi-point calibration of an adaptive voltage scaling (AVS) system. A plurality of Reference Calibration Codes (RCCs) within a multi-point calibration table is provided. Each code is associated with one of the clock frequencies of the adaptive voltage scaling (AVS) system. The present invention provides multi-point calibration by calibrating a Reference Calibration Code (RCC) for each operating point (clock frequency) of the adaptive voltage scaling (AVS) system.

Abstract: A hybrid digital pulse width modulator (DPWM) with digital delay-locked loops (DLLs) is provided. In this implementation, the digital pulse-width-modulator is synthesizable and includes a digital delay-locked loop around a delay-line to achieve constant frequency clocked operation. In this implementation, the resolution of the modulator is consistent over a wide range of process or temperature variations. The DPWM may implement trailing-edge, leading-edge, triangular, or phase-shift modulation. In an implementation suitable for DC-DC converters with synchronous rectifiers, for example, the DPWM may include two or more outputs for programmable dead-times. In another implementation, a digital pulse-width-modulator with a digital phase-locked loop is also provided.

Abstract: A method for minimizing power consumption in a mobile device using cooperative adaptive voltage and threshold scaling is provided that includes receiving a supply voltage, a PMOS back bias voltage, and an NMOS back bias voltage. A clock signal is received. The clock signal is propagated through a timing comparison circuit. An output of the timing comparison circuit is examined. A determination is made regarding whether to request more power based on the output of the timing comparison circuit. A voltage control signal is sent to request more power when a determination is made to request more power based on the output of the timing comparison circuit.

Abstract: A converter module for use as a phase in a multiphase DC-DC converter having a data bus for transferring current-sharing information is provided. The converter module includes a power stage and a controller. The power stage comprises an input for receiving an input voltage and an output for providing an output voltage and an output current. The controller is coupled to the power stage to receive a feedback signal from the power stage. The controller further comprises a data bus port configured to receive the current-sharing information from the data bus and provide updated current-sharing information to the data bus.

Abstract: A digital PFC (DPFC) control approach that requires no input voltage sensing or current loop compensation is described. The approach can provide stable, low-harmonic operation over a universal input voltage range and load ranging from high-load operation in continuous conduction mode down to near-zero load. A fast voltage loop can also be incorporated into a DPFC controller to provide additional control of the power stage. A controller can be based on low-resolution DPWM and A/D converters, can be implemented without microcontroller or DSP programming, and is well suited for simple, low-cost integrated-circuit realizations.

Abstract: An architecture is described for digital multi-phase modulators (MPM) that leads to an efficient, high performance hardware realization. The combined modulator, switching phases and output filter can be viewed as a multi-level digital to analog converter with high power output, or a power D/A, and concepts used in D/A converters are leveraged to achieve high performance and hardware efficiency. The modulator can be split into three functional blocks including a decoder that determines how many phases are on at any time, a selector that determines which phases are on at any time, and a single high resolution module that is time shared among all phases. The resulting architecture scales favorably with a large number of phases, fs, facilitates fast update rates of the input command well above the single phase switching frequency and is compatible with a wide range of known DPWM techniques for the LSB module and resolution-enhancement techniques such as dithering or ?-? modulation.