Abstract: Systems, methods, and apparatuses are disclosed for determining dead-times in switched-mode DC-DC converters with synchronous rectifiers or other complementary switching devices. In one embodiment, for example, a controller for a DC-DC converter determines dead-times for switching devices of a synchronous rectifier or other complementary switching device of the converter in which a dead-time is derived from an output voltage or current that is already sensed and used in the output regulation of the converter. In another embodiment, a controller is provided for controlling a switched-mode DC-DC converter comprising a pair of power switches. The controller comprises an input, a reference generator, a comparator, a compensator, a dead-time sub-controller, and a modulator. In another embodiment, the controller may adjust the dead-times during the operation of the converter to adjust periodically and/or in response to changes in operating conditions.

Abstract: A digital current-mode controller for a DC-DC converter is disclosed. The controller comprises a digital current reference; and a current loop compensator adapted to receive a digital current error signal derived from a digital current sample sensed from the DC-DC converter and the digital current reference and to generate a duty-cycle command, wherein the current loop compensator comprises a low-pass filter that is used in generating the duty-cycle command. A DC-DC regulator comprising a digital current-mode controller and a method of controlling a DC-DC converter are also disclosed.

Abstract: Differential delay-line analog-to-digital (A/D) converters for use in current and power sensing applications are provided. These A/D converters are well suited for a wide range of electronic applications, including over-load protection, current mode control, current sharing in digitally controlled switched-mode power supplies, power sensing, and implementation of power optimization methods in power management applications.

Abstract: A digital pulse-width modulator is provided that receives a digital command input signal and a secondary control input signal and provides a pulse-width-modulated output signal. The pulse-width-modulated output signal comprises a pulse-width that corresponds to an integer number of slots each having a time duration. The integer number of slots corresponds to a value of the digital command signal, and the time duration is determined based upon the secondary control input signal. In one embodiment, the digital pulse-width-modulator comprises a plurality of delay cells arranged in series for propagating a clock signal through the plurality of delay cells. A time delay for each of the delay cells is determined by the secondary control input signal.

Abstract: A method and apparatus for measuring or converting voltage, the method comprising: applying an input voltage to a primary delay line; applying a reference voltage to a timer delay line; propagating a delay signal through the primary delay line; propagating a timer signal through the timer delay line; establishing a sampling period based on the timer signal propagation; and measuring an extent of delay signal propagation along the primary delay line during the established sampling period, the measured signal propagation extent being indicative of a difference between the input voltage and the reference voltage.

Abstract: The present invention provides a method for producing a controlled output voltage for a switching power converter under current control using pulse width modulation, the switching power converter including a predictive digital current-mode controller and a digital pulse width modulator. The current control results in an unstable output voltage, and the pulse width modulation method is selected to eliminate the instability of the output voltage.

Abstract: Differential delay-line analog-to-digital (A/D) converters for use in current and power sensing applications are provided. These A/D converters are well suited for a wide range of electronic applications, including over-load protection, current mode control, current sharing in digitally controlled switched-mode power supplies, power sensing, and implementation of power optimization methods in power management applications.

Abstract: A converter module for use as a phase in a multiphase DC-DC converter having a data bus for transferring current-sharing information is provided. The converter module comprises a power stage and a controller. The power stage comprises an input for receiving an input voltage and an output for providing an output voltage and an output current. The controller is coupled to the power stage to receive a feedback signal from the power stage. The controller further comprises a data bus port configured to receive the current-sharing information from the data bus and provide updated current-sharing information to the data bus.

Abstract: A digital pulse-width modulator is provided that receives a digital command input signal and a secondary control input signal and provides a pulse-width-modulated output signal. The pulse-width-modulated output signal comprises a pulse-width that corresponds to an integer number of slots each having a time duration. The integer number of slots corresponds to a value of the digital command signal, and the time duration is determined based upon the secondary control input signal. In one embodiment, the digital pulse-width-modulator comprises a plurality of delay cells arranged in series for propagating a clock signal through the plurality of delay cells. A time delay for each of the delay cells is determined by the secondary control input signal.

Abstract: There is disclosed a digital circuit comprising a digital processing component, an adjustable power supply and power supply adjustment circuitry. The digital processing component is capable of operating at a plurality of selected clock frequencies, wherein a maximum delay time of a critical path in the digital processing component is determined by a level of a power supply, VDD, of the digital processing component. The adjustable power supply is capable of supplying VDD to the digital processing component. The power supply adjustment circuitry is operable to receive a first selected clock signal and adjusts the level of VDD such that the maximum delay time of the critical path of the digital processing component is less than a pulse-width duration between a first clock edge of the first selected clock signal and a second clock edge of the first selected clock signal immediately following the first clock edge.

Abstract: There is disclosed an adaptive voltage power supply that finely adjusts VDD to an optimum level. The adaptive voltage power supply comprises: 1) a first charging circuit capable of increasing a reference voltage on a charge capacitor in response to receipt of a first VDD control signal; 2) a second charging circuit capable of decreasing the reference voltage on the charge capacitor in response to receipt of a second VDD control signal; and 3) a power supply capable of receiving the reference voltage on the charge capacitor and generating an output power level, VDD, determined by a level of the reference voltage.

Abstract: A communications system interleaves control pulses between the transitions in a serial bit stream to form an interleaved signal. The serial bit stream has a series of transitions and a series of gaps between transitions where a transition can not occur. An interleaver identifies gaps in the serial bit stream, and inserts the control pulses in the gaps to form the interleaved signal. The interleaved signal reduces the pin count when the interleaved signal is transmitted between chips.

Abstract: Systems, methods, and apparatuses are disclosed for determining dead-times in switched-mode DC-DC converters with synchronous rectifiers or other complementary switching devices. In one embodiment, for example, a controller for a DC-DC converter determines dead-times for switching devices of a synchronous rectifier or other complementary switching device of the converter in which a dead-time is derived from an output voltage or current that is already sensed and used in the output regulation of the converter. In another embodiment, a controller is provided for controlling a switched-mode DC-DC converter comprising a pair of power switches. The controller comprises an input, a reference generator, a comparator, a compensator, a dead-time sub-controller, and a modulator. In another embodiment, the controller may adjust the dead-times during the operation of the converter to adjust periodically and/or in response to changes in operating conditions.

Abstract: Apparatus for efficiently supplying energy to a device in a circuit, the apparatus comprising a powered device having a critical path delay; delay line operative to model said critical path delay; control logic responsive to output from said delay line and operative to generate control output; and a power converter operative to adjust supply voltage to said powered device in response to said generated control output, wherein the delay line, the control logic, and the power converter cooperate to provide first order bang-bang control of said critical path delay.

Abstract: A method for providing self-calibration for adaptively adjusting a power supply voltage in a digital processing system is provided that includes providing a nominal power supply voltage to the system as a power supply voltage. A regulator clock signal is propagated through a delay line. The delay line comprises a plurality of delay cells and is operable to function based on the nominal power supply voltage. A plurality of pairs of delay cells are sampled until a first and second delay cell are identified based on the first delay cell receiving the regulator clock signal and the second delay cell failing to receive the regulator clock signal at a specified time. A reference voltage is provided to the system as the power supply voltage. The system is operated using the first and second delay cells to determine whether to adjust the power supply voltage for the system.

Abstract: A method and apparatus for measuring or converting voltage, the method comprising: applying an input voltage to a primary delay line; applying a reference voltage to a timer delay line; propagating a delay signal through the primary delay line; propagating a timer signal through the timer delay line; establishing a sampling period based on the timer signal propagation; and measuring an extent of delay signal propagation along the primary delay line during the established sampling period, the measured signal propagation extent being indicative of a difference between the input voltage and the reference voltage.

Abstract: A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.

Abstract: There is disclosed control circuitry for adjusting a power supply level, VDD, of a digital processing component having varying operating frequencies. The control circuitry comprises N delay cells and power supply adjustment circuitry. The N delay cells are coupled in series, each of which has a delay D determined by a value of VDD, such that a clock edge applied to an input of a first delay cell ripples sequentially through the N delay cells. The power supply adjustment circuitry capable of adjusting VDD and is operable to (i) monitor outputs of at least a K delay cell and a K+1 delay cell, (ii) determine that the clock edge has reached an output of the K delay cell and has not reached an output of the K+1 delay cell, and (iii) generate a control signal capable of adjusting VDD in response thereto.

Abstract: A method and apparatus for measuring or converting voltage, the method comprising: applying an input voltage to a primary delay line; applying a reference voltage to a timer delay line; propagating a delay signal through the primary delay line; propagating a timer signal through the timer delay line; establishing a sampling period based on the timer signal propagation; and measuring an extent of delay signal propagation along the primary delay line during the established sampling period, the measured signal propagation extent being indicative of a difference between the input voltage and the reference voltage.

Abstract: There is disclosed clock control circuitry for selectively applying a clock signal to a digital processing component wherein the clock signal is capable of being changed to a plurality of operating frequencies. The clock control circuitry is operable to (i) receive a command to change a first operating frequency to a second operating frequency, (ii) in response to the command, disable the applied clock signal, (iii) generate a test clock signal having the second operating frequency, (iv) apply the test clock signal to a power supply adjustment circuit, and (v) sense a status signal from the power supply adjustment circuit. The status signal indicates that a power supply level of the digital processing component has been adjusted to an optimum value suitable for the second operating frequency.