Abstract: Organic light emitting display (OLED) devices and methods of rendering image of an OLED device. A pixel of the OLED device includes a first sub-pixel corresponding to a first color, comprising a first pixel electrode and a second sub-pixel corresponding to a second color, comprising a second pixel electrode. A portion of the second pixel electrode is operatively associated with a portion of the first sub-pixel, such that activation of second pixel electrode activates both the first sub-pixel and said portion of the first sub-pixel independent of activation of the first pixel electrode.

Abstract: A design approach for a panel including a luminiferous unit and a driving unit. The luminiferous unit comprises first and second color components respectively constituting first and second light component sources. First and second light components are emitted from the first and the second light component sources. The color of the first light component differs from that of the second light component. The design approach comprises defining a specific relationship according to a characteristic between the first and the second color components; and designing the driving unit according to the specific relationship.

Abstract: A pixel driving circuit with threshold voltage and EL power compensation. The pixel circuit includes a storage capacitor, a transferring circuit, a driving element, and a switching circuit. The transferring circuit transfers a data signal or a variable reference signal to a first node of the storage capacitor. The driving element has a first terminal coupled to a first fixed potential and a second terminal coupled to a second node of the storage capacitor. The switching circuit is coupled to a third terminal of the driving element and the second node of the storage capacitor. The switching circuit can be controlled to make the driving element diode-connected in one time period and allowing a driving current to be output to a display element in another time period.

Abstract: A method for forming thin film transistor with lateral crystallization. The method at least includes the following steps. First of all, an insulation substrate is provided. Then, an amorphous silicon layer is provided on the insulation substrate. The seeds are formed by annealing a portion of said amorphous silicon layer by excimer laser system, and the lateral-growth grain is formed by using the seeds to grow laterally by annealing the amorphous silicon layer, wherein the amorphous silicon layer defines an active region. Then, sequentially a dielectric layer and a polysilicon layer is deposited on the active region, wherein the dielectric layer and the polysilicon layer are gate electrode, a gate is defined on the substrate, and the polysilicon layer is formed by etching. Next, source and drain regions are formed by implanting numerous ions into amorphous silicon layer by using the gate electrode as a mask.

Abstract: A method for forming thin film transistor with lateral crystallization. The method at least includes the following steps. First of all, an insulation substrate is provided. Then, an amorphous silicon layer is provided on the insulation substrate. The seeds are formed by annealing a portion of the amorphous silicon layer by excimer laser system, and the lateral-growth grain is formed by using the seeds to grow laterally by annealing the amorphous silicon layer, wherein the amorphous silicon layer defines an active region. Then, sequentially a dielectric layer and a polysilicon layer is deposited on the active region, wherein the dielectric layer and the polysilicon layer are gate electrodes, a gate is defined on the substrate, and the polysilicon layer is formed by etching. Next, source and drain regions are formed by implanting numerous ions into amorphous silicon layer by using the gate electrode as a mask.

Abstract: A low temperature polysilicon manufacturing method. A system for performing physical vapor deposition is used to form an amorphous silicon film with micro-crystals therein. The amorphous silicon film is annealed at a temperature between 400° C. to 500° C. for about 6 to 16 hours to form a polysilicon film. The polysilicon film can be further processed into a low-temperature polysilicon film transistor.

Abstract: A method of manufacturing a method of manufacturing a thin film transistor. An aluminum gate electrode is formed on a substrate. A protective layer is formed on the top surface and the sidewall of the aluminum gate electrode. A gate dielectric layer is formed on the substrate and the protective layer. An intrinsic amorphous-silicon thin film is formed on the gate dielectric layer. A heavily doped amorphous-silicon thin film is formed on the intrinsic amorphous-silicon thin film. A patterned source/drain conductive layer is formed on the heavily doped amorphous-silicon thin film to expose a portion of the heavily doped amorphous-silicon thin film. The portion of the heavily doped amorphous-silicon thin film exposed by the patterned source/drain conductive layer is removed to expose a portion of the intrinsic amorphous-silicon thin film.

Abstract: A transient switching circuit is provided to generate a voltage signal with fast voltage switching phenomenon during the initial ESD transient. The voltage signal is applied to a current spike generator for generating a current spike which forward bias an n+/pwell diode for injecting minority carriers into a substrate on which ESD protection device is embodied. The injected minority carriers are used to trigger turn-on of the ESD protection device. These minority carriers flow toward the drain-substrate junction of the NMOS transistor such that the NMOS transistor is triggered at a trigger voltage lower than that provided by the prior arts. The present invention improves the ESD performance of an ESD protection device, such as a MOSFET or bipolar transistor, which is provided for protecting the power bus or IC pins during an ESD event.