Patents by Inventor Duck Hoi KOO

Duck Hoi KOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10810118
    Abstract: A data storage device includes a nonvolatile memory device and a controller configured to control an operation of the nonvolatile memory device. The controller includes a volatile memory including a first index storage unit in which first index information for first data buffers are stored and a second index storage unit in which second index information for second data buffers are stored, a first central processing unit (CPU) configured to perform allocation and release of allocation of the first data buffers by accessing the first index storage unit of the volatile memory, and a second CPU configured to perform allocation and release of allocation of the second data buffers by accessing the second index storage unit of the volatile memory.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: October 20, 2020
    Assignee: SK hynix Inc.
    Inventors: Soong Sun Shin, Duck Hoi Koo, Yong Tae Kim, Cheon Ok Jeong
  • Patent number: 10802751
    Abstract: A memory system may include: a memory device comprising a plurality of channels, a plurality of dies coupled to the respective channels, and a plurality of super blocks; and a controller suitable for controlling the memory device, wherein the controller includes: a detector suitable for searching for a first available reserved block in a first die, when a bad block has occurred in the first die which is coupled to a first channel and belongs to a first super block group, and searching for a second available reserved block in a second die which is coupled to the first channel and belongs to a second super block group when the first available reserved block is not present in the first die; and an assignor suitable for replacing the bad block with the second available reserved block when the second available reserved block is present.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 13, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Yong-Tae Kim
  • Patent number: 10769060
    Abstract: Provided herein may be a storage system and a method of operating the same. The method of operating the storage system may include outputting, by a host system, a command for reading address mapping data, pieces of which correspond to first to (n?1)-th memory systems, the address mapping data being stored in an n-th memory system, where n is a natural number of 3 or more, outputting, in a first transmission operation, the address mapping data from the n-th memory system and inputting the address mapping data to the host system in response to the command, and outputting, in a second transmission operation, the address mapping data from the host system and inputting the address mapping data to the first to (n?1)-th memory systems.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: September 8, 2020
    Assignee: SK hynix Inc.
    Inventors: Yong Jin, Duck Hoi Koo, Seung Geol Baek
  • Publication number: 20200249854
    Abstract: A data storage device may include: a memory device; and a controller configured to control an operation of the memory device. The controller may include a first CPU and a second CPU including a plurality of cores, wherein the first CPU compares P/E (Program/Erase) average counts for the plurality of cores of the second CPU, and performs a remapping operation of changing a core which is mapped to logical block addresses received from a host.
    Type: Application
    Filed: October 22, 2019
    Publication date: August 6, 2020
    Applicant: SK hynix Inc.
    Inventors: Duck Hoi KOO, Seung Geol BAEK, Young Ho KIM, Suk Ho JUNG
  • Publication number: 20200241955
    Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks and a controller for controlling the nonvolatile memory device. A plurality of management blocks includes first and second management blocks managed by the controller. The second management block stores start data and then stores integrity data. The first management block stores a storage location of the second management block. An integrity checker checks integrity of data associated with the first and second management blocks.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: Jang Hwan JUN, Duck Hoi KOO, Soong Sun SHIN, Yong Tae KIM, Yong Chul KIM, Cheon Ok JEONG
  • Publication number: 20200242044
    Abstract: An operating method for a data storage device includes providing a nonvolatile memory device including a plurality of pages; segmenting an address map which maps a logical address provided from a host device and a physical address of the nonvolatile memory device, by a plurality of address map segments according to a segment size that is set depending on a quality of service time allowed to process a request of the host device and an unprocessed workload; and flushing at least one of the address map segments in the nonvolatile memory device after processing the unprocessed workload.
    Type: Application
    Filed: April 17, 2020
    Publication date: July 30, 2020
    Inventors: Min Hwan MOON, Duck Hoi KOO, Soong Sun SHIN, Ji Hoon LEE
  • Patent number: 10725910
    Abstract: A controller may include a memory suitable for caching write data and map data corresponding to the write data; and a processor suitable for flushing the cached map data in a memory device, and then storing the write data in the memory device, wherein the map data includes location information of the write data.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: July 28, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Yong-Tae Kim, Soong-Sun Shin, Cheon-Ok Jeong
  • Patent number: 10691352
    Abstract: In a method of operating a data storage device including a non-volatile memory device, which includes a closed memory block and an open memory block, a scan pointer and a map scan information of the open memory block is generated. The scan pointer indicates a page next to a page to which a writing operation is completed. The map scan information includes a logical address information mapped in a page of the open memory block. When the data storage device is recovered from a power loss, the logical address information is read based on the map scan information. An address map is rebuilt based on the read logic address information.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: June 23, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
  • Publication number: 20200192759
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Application
    Filed: February 24, 2020
    Publication date: June 18, 2020
    Inventors: Nam Oh HWANG, Yong-Tae KIM, Soong-Sun SHIN, Duck-Hoi KOO
  • Patent number: 10671527
    Abstract: A method for operating a data storage device including a non-volatile memory device including a first region and a second region includes: storing data from a data cache memory in memory blocks in the first region; determining a first garbage collection cost with respect to a first target memory block having the least valid page among the memory blocks in the first region in which the data are kept; determining a second garbage collection cost with respect to a second target memory block having the least valid page among the memory blocks in the first region from which the data are cleared; and performing a garbage collection operation to copy valid data of a garbage collection target memory block into memory blocks in the second region based on a comparison result of the first garbage collection cost and the second garbage collection cost.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: June 2, 2020
    Assignee: SK hynix Inc.
    Inventors: Yong Tae Kim, Duck Hoi Koo, Soong Sun Shin, Cheon Ok Jeong
  • Patent number: 10664355
    Abstract: A data storage device includes a nonvolatile memory device; and a controller suitable for: performing a recovery operation for the nonvolatile memory device in response to a sudden power-off based on a recovery state of the nonvolatile memory device; updating the recovery state of the nonvolatile memory device while performing the recovery operation to a predetermined recovery state after performing a repair operation for at least one open memory block of the nonvolatile memory device in the recovery operation; and performing a write operation from after a position where the repair operation is performed in the at least one open memory block, in the predetermined recovery state.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: May 26, 2020
    Assignee: SK hynik Inc.
    Inventors: Duck Hoi Koo, Seung Gu Ji
  • Patent number: 10656846
    Abstract: A method for operating a memory system includes updating, after accessing ail of one or more first memory regions included in a first list for a purpose of data storage, map data for the first memory regions; determining a list size based on a workload of the memory system, and generating a second list including one or more second memory regions depending on the list size; and accessing, after the updating of the map data, the second memory regions for a purpose of data storage.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: May 19, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Soong Sun Shin, Yong Tae Kim
  • Patent number: 10657046
    Abstract: A data storage device includes a nonvolatile memory device including memory block groups and map data blocks, each memory block group including a first page group storing data transmitted from a host device and a second page group storing address mapping information corresponding to the data; and a controller configured to determine whether the number of valid data stored in a first memory block group in which the second page group is damaged is equal to or smaller than a size of an available capacity of an open map data block which is being used, and control, when the number of the valid data is equal to or smaller than the available capacity, the nonvolatile memory device to store address mapping information corresponding to the valid data of the first memory block group, in the open map data block.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: May 19, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Yong Chul Kim, Yong Tae Kim, Cheon Ok Jeong
  • Patent number: 10635347
    Abstract: A memory system may include: a memory device; and a controller suitable for: receiving a plurality of commands from a host; performing command operations corresponding to the commands to the memory device; providing operation results of the command operations to the host; and performing processing results including processing receptions of the commands, requests for performing the command operations and operation results for the command operations at a regular time duration interval.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: April 28, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Soong-Sun Shin
  • Patent number: 10628323
    Abstract: An operating method for a data storage device includes providing a nonvolatile memory device including a plurality of pages; segmenting an address map which maps a logical address provided from a host device and a physical address of the nonvolatile memory device, by a plurality of address map segments according to a segment size that is set depending on a quality of service time allowed to process a request of the host device and an unprocessed workload; and flushing at least one of the address map segments in the nonvolatile memory device after processing the unprocessed workload.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: April 21, 2020
    Assignee: SK hynix Inc.
    Inventors: Min Hwan Moon, Duck Hoi Koo, Soong Sun Shin, Ji Hoon Lee
  • Patent number: 10585792
    Abstract: A data processing system includes a host suitable for providing an access request; and a plurality of memory systems suitable for storing or reading data thereto or therefrom in response to the access request, wherein the host includes a host memory buffer suitable for storing a plurality of meta-data respectively corresponding to the plurality of memory systems, wherein each of the plurality of meta-data includes a first threshold value representing storage capacity for user data in a corresponding memory system among the plurality of memory systems, a second threshold value representing a number of read operations for logical block addresses (LBAs) of the corresponding memory system, a third threshold value representing a temperature of the corresponding memory system and respective LBAs of the plurality of memory systems.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: March 10, 2020
    Assignee: SK hynix Inc.
    Inventors: Soong-sun Shin, Duck-Hoi Koo, Yong-Tae Kim, Cheon-Ok Jeong
  • Publication number: 20200057728
    Abstract: a memory system includes a memory device comprising a plurality of memory cells storing data, and configured to perform one or more of a write operation, read operation and erase operation on the plurality of memory cells; and a controller configured to control an operation of the memory device, wherein the controller is configured to: cache a logical block addressing (LBA) mapping table from the memory device when the memory system is powered on by driving power applied thereto; and transfer a direct memory access (DMA) setup to a host when the LBA mapping table is cached.
    Type: Application
    Filed: April 29, 2019
    Publication date: February 20, 2020
    Inventors: Duck Hoi KOO, Soong Sun SHIN, Sang Hyun KIM
  • Patent number: 10528469
    Abstract: An memory system includes a memory device that includes a first memory block and a super memory block including simultaneously controllable second memory blocks and a controller including a memory, and suitable for storing a data corresponding to a command in the memory, deciding a type of the command and a type of the data, and controlling the memory device to write the data in the first memory block or the super memory block based on the type of the command and the type of the data.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: January 7, 2020
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Soong-Sun Shin
  • Patent number: 10521138
    Abstract: A memory system including a nonvolatile memory device storing operation logs and map data; a volatile memory for temporarily storing the map data; and a controller flushing the map data from the volatile memory into the nonvolatile memory device by units of map data groups, and rebuilding the map data by selectively reading the map data by the units of map data groups from the nonvolatile memory device into the volatile memory according to the operation logs, wherein the operation logs indicate: locations of first and last pages to store the flushed map data; a start of an error management operation to a program error during the flushing of the map data; and a location of a last page storing normally flushed map data before an occurrence of the program error.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Yong-Tae Kim, Soong-Sun Shin, Cheon-Ok Jeong
  • Publication number: 20190384681
    Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.
    Type: Application
    Filed: August 28, 2019
    Publication date: December 19, 2019
    Inventors: Duck Hoi KOO, Yong Tae KIM, Soong Sun SHIN, Cheon Ok JEONG