Patents by Inventor Duck Hoi KOO

Duck Hoi KOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190369908
    Abstract: A memory system may include: a memory device comprising a plurality of channels, a plurality of dies coupled to the respective channels, and a plurality of super blocks; and a controller suitable for controlling the memory device, wherein the controller includes: a detector suitable for searching for a first available reserved block in a first die, when a bad block has occurred in the first die which is coupled to a first channel and belongs to a first super block group, and searching for a second available reserved block in a second die which is coupled to the first channel and belongs to a second super block group when the first available reserved block is not present in the first die; and an assignor suitable for replacing the bad block with the second available reserved block when the second available reserved block is present.
    Type: Application
    Filed: December 13, 2018
    Publication date: December 5, 2019
    Inventors: Duck-Hoi KOO, Yong-Tae Kim
  • Publication number: 20190361778
    Abstract: A memory system may include: a memory device including a plurality of storage regions; and a controller. The controller may be coupled between a host and the memory device, and perform a read retry operation when a read error occurs in any one of the storage regions based on occurrence possibilities for a plurality of different type of defects in any one storage region where a read error occurred.
    Type: Application
    Filed: August 6, 2019
    Publication date: November 28, 2019
    Inventors: Yong-Tae KIM, Soong-Sun SHIN, Duck-Hoi KOO
  • Patent number: 10430297
    Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 1, 2019
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
  • Patent number: 10379955
    Abstract: A memory system may include: a memory device including a plurality of storage regions; and a controller. The controller may be coupled between a host and the memory device, and perform a read retry operation when a read error occurs in any one of the storage regions based on occurrence possibilities for a plurality of different type of defects in any one storage region where a read error occurred.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: August 13, 2019
    Assignee: SK hynix Inc.
    Inventors: Yong-Tae Kim, Soong-Sun Shin, Duck-Hoi Koo
  • Publication number: 20190235790
    Abstract: There are provided an electronic system and an operating method thereof. The electronic system includes: a host for queuing an external command to wait or to be output, based on a status of dies included in a storage device; a central processing unit for generating a command for controlling the storage device in response to a request received from the host or the external command; and a controller memory buffer for storing status information indicating whether the dies are in a status in which access is possible or a status in which access is impossible, wherein the central processing unit receives status information of the dies from the storage device, and stores status information matched to each of the dies in the controller memory buffer.
    Type: Application
    Filed: August 28, 2018
    Publication date: August 1, 2019
    Inventors: Duck Hoi KOO, Yong JIN
  • Patent number: 10346052
    Abstract: A memory system includes a nonvolatile memory device; and a controller suitable for processing a write request of first data transmitted from a host device. The controller includes a first processing circuit suitable for generating a read command afforded with a priority, based on the write request; and a second processing circuit suitable for processing the read command according to the priority and thereby reading second data including old data of the first data from the nonvolatile memory device.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: July 9, 2019
    Assignee: SK hynix Inc.
    Inventors: Seung Gu Ji, Duck Hoi Koo
  • Patent number: 10324630
    Abstract: A memory system includes a controller and a plurality of nonvolatile memories; a temperature control unit suitable for measuring a temperature of each of the plurality of nonvolatile memories, and comparing each measured temperature with a predetermined threshold value; a signal generation unit generating busy signals corresponding to one or more of the nonvolatile memories when the measured temperature is higher than the predetermined threshold value; and an interface unit transmitting the busy signal to the controller.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: June 18, 2019
    Assignee: SK hynix Inc.
    Inventors: Duck-Hoi Koo, Yong Jin
  • Patent number: 10324835
    Abstract: A data storage device includes a first nonvolatile memory device including first LSB, CSB and MSB pages; a second nonvolatile memory device including second LSB, CSB and MSB pages; a data cache memory is configured to store data write-requested from a host device; and a control unit suitable for configuring the first and second LSB pages as an LSB super page, configuring the first and second CSB pages as a CSB super page, and configuring the first and second MSB pages as an MSB super page, wherein the control unit is configured to one-shot programs the data stored in the data cache memory in the first LSB, CSB and MSB pages when determination is made as a data stability mode, and is configured to one-shot programs data stored in the data cache memory in the LSB, CSB and MSB super pages in a performance-improving mode.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: June 18, 2019
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Yong Jin
  • Publication number: 20190179742
    Abstract: Provided herein may be a storage system and a method of operating the same. The method of operating the storage system may include outputting, by a host system, a command for reading address mapping data, pieces of which correspond to first to (n?1)-th memory systems, the address mapping data being stored in an n-th memory system, where n is a natural number of 3 or more, outputting, in a first transmission operation, the address mapping data from the n-th memory system and inputting the address mapping data to the host system in response to the command, and outputting, in a second transmission operation, the address mapping data from the host system and inputting the address mapping data to the first to (n?1)-th memory systems.
    Type: Application
    Filed: July 11, 2018
    Publication date: June 13, 2019
    Inventors: Yong JIN, Duck Hoi KOO, Seung Geol BAEK
  • Publication number: 20190163387
    Abstract: Provided herein may be a memory controller, a memory system having the same, and a method of operating the same. The memory controller may include an operating environment determiner configured to determine an operating environment of a memory device based on at least one of surrounding environment-sensing data, and a central processing unit (CPU) configured to determine operating characteristics of the memory device required in the determined operating environment, select a policy depending on the determined operating characteristics, and control an operation of the memory device based on the selected policy.
    Type: Application
    Filed: June 27, 2018
    Publication date: May 30, 2019
    Inventors: Yong JIN, Duck Hoi KOO, Jin Pyo KIM
  • Publication number: 20190163625
    Abstract: A data storage device includes a nonvolatile memory device including memory block groups and map data blocks, each memory block group including a first page group storing data transmitted from a host device and a second page group storing address mapping information corresponding to the data; and a controller configured to determine whether the number of valid data stored in a first memory block group in which the second page group is damaged is equal to or smaller than a size of an available capacity of an open map data block which is being used, and control, when the number of the valid data is equal to or smaller than the available capacity, the nonvolatile memory device to store address mapping information corresponding to the valid data of the first memory block group, in the open map data block.
    Type: Application
    Filed: June 21, 2018
    Publication date: May 30, 2019
    Inventors: Duck Hoi KOO, Yong Chul KIM, Yong Tae KIM, Cheon Ok JEONG
  • Publication number: 20190138447
    Abstract: A controller may include a memory suitable for caching write data and map data corresponding to the write data; and a processor suitable for flushing the cached map data in a memory device, and then storing the write data in the memory device, wherein the map data includes location information of the write data.
    Type: Application
    Filed: June 7, 2018
    Publication date: May 9, 2019
    Inventors: Duck-Hoi KOO, Yong-Tae KIM, Soong-Sun SHIN, Cheon-Ok JEONG
  • Publication number: 20190065362
    Abstract: A data storage device includes a nonvolatile memory device and a controller configured to control an operation of the nonvolatile memory device. The controller includes a volatile memory including a first index storage unit in which first index information for first data buffers are stored and a second index storage unit in which second index information for second data buffers are stored, a first central processing unit (CPU) configured to perform allocation and release of allocation of the first data buffers by accessing the first index storage unit of the volatile memory, and a second CPU configured to perform allocation and release of allocation of the second data buffers by accessing the second index storage unit of the volatile memory.
    Type: Application
    Filed: June 6, 2018
    Publication date: February 28, 2019
    Inventors: Soong Sun SHIN, Duck Hoi KOO, Yong Tae KIM, Cheon Ok JEONG
  • Publication number: 20190057049
    Abstract: A memory system includes a nonvolatile memory device including a plurality of planes; and a controller suitable for determining whether a first read operation for the nonvolatile memory device is a random read operation, and accessing at least one first target plane of the first read operation, according to an access merge process, depending on a determination result, wherein the controller simultaneously accesses the first target plane and at least one second target plane included in the nonvolatile memory device, according to the access merge process.
    Type: Application
    Filed: December 18, 2017
    Publication date: February 21, 2019
    Inventors: Duck Hoi KOO, Soong Sun SHIN, Yong Tae KIM, Cheon Ok JEONG
  • Publication number: 20190050147
    Abstract: A memory system includes a controller and a plurality of nonvolatile memories; a temperature control unit suitable for measuring a temperature of each of the plurality of nonvolatile memories, and comparing each measured temperature with a predetermined threshold value; a signal generation unit generating busy signals corresponding to one or more of the nonvolatile memories when the measured temperature is higher than the predetermined threshold value; and an interface unit transmitting the busy signal to the controller.
    Type: Application
    Filed: March 2, 2018
    Publication date: February 14, 2019
    Inventors: Duck-Hoi KOO, Yong JIN
  • Publication number: 20190026222
    Abstract: A controller includes: a victim list update unit suitable for storing information on an error block in a victim list when the error block is detected; a control unit suitable for deciding whether or not to perform a copy operation based on whether or not a predetermined condition is satisfied; a copy unit suitable for copying the error block into a destination super block while maintaining a location of a die when the control unit performs the copy operation; and a victim list delete unit suitable for deleting the victim list including the error block when the copy operation ends.
    Type: Application
    Filed: February 22, 2018
    Publication date: January 24, 2019
    Inventors: Duck-Hoi KOO, Yong-Tae KIM, Soong-Sun SHIN, Cheon-Ok JEONG
  • Publication number: 20190018602
    Abstract: In a method of operating a data storage device including a non-volatile memory device, which includes a closed memory block and an open memory block, a scan pointer and a map scan information of the open memory block is generated. The scan pointer indicates a page next to a page to which a writing operation is completed. The map scan information includes a logical address information mapped in a page of the open memory block. When the data storage device is recovered from a power loss, the logical address information is read based on the map scan information. An address map is rebuilt based on the read logic address information.
    Type: Application
    Filed: January 29, 2018
    Publication date: January 17, 2019
    Inventors: Duck Hoi KOO, Yong Tae KIM, Soong Sun SHIN, Cheon Ok JEONG
  • Publication number: 20190018768
    Abstract: A method for operating a data storage device including a non-volatile memory device including a first region and a second region includes: storing data from a data cache memory in memory blocks in the first region; determining a first garbage collection cost with respect to a first target memory block having the least valid page among the memory blocks in the first region in which the data are kept; determining a second garbage collection cost with respect to a second target memory block having the least valid page among the memory blocks in the first region from which the data are cleared; and performing a garbage collection operation to copy valid data of a garbage collection target memory block into memory blocks in the second region based on a comparison result of the first garbage collection cost and the second garbage collection cost.
    Type: Application
    Filed: December 4, 2017
    Publication date: January 17, 2019
    Inventors: Yong Tae Kim, Duck Hoi Koo, Soong Sun Shin, Cheon Ok Jeong
  • Publication number: 20190018767
    Abstract: A data storage device includes a first nonvolatile memory device including first LSB, CSB and MSB pages; a second nonvolatile memory device including second LSB, CSB and MSB pages; a data cache memory is configured to store data write-requested from a host device; and a control unit suitable for configuring the first and second LSB pages as an LSB super page, configuring the first and second CSB pages as a CSB super page, and configuring the first and second MSB pages as an MSB super page, wherein the control unit is configured to one-shot programs the data stored in the data cache memory in the first LSB, CSB and MSB pages when determination is made as a data stability mode, and is configured to one-shot programs data stored in the data cache memory in the LSB, CSB and MSB super pages in a performance-improving mode.
    Type: Application
    Filed: January 31, 2018
    Publication date: January 17, 2019
    Inventors: Duck Hoi KOO, Yong JIN
  • Publication number: 20180349045
    Abstract: A operating method of memory system including a controller and a memory device may efficiently flush map data for the Sudden Power Off Recovery SPOR.
    Type: Application
    Filed: December 11, 2017
    Publication date: December 6, 2018
    Inventors: Duck-Hoi KOO, Yong-Tae KIM, Soong-Sun SHIN, Cheon-Ok JEONG