Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.

Abstract: In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution and reliability redundancy. The first and second bumps provide a first and second electric current pathway between the integrated circuit and package substrate. The shunt provides a third electric current pathway between the first bump and the second bump.

Abstract: In one embodiment, a method including providing a semiconductor pad package having a first pad and a second pad is disclosed. A first layer comprising a first metal is deposited on the first pad using a first process. A second metal is then deposited on the first pad and the first layer using a second process. In another embodiment, the first process comprises and electroplating process, and the second process comprises a direct immersion gold (DIG) process. In a further embodiment, the first pad is a power or ground pad, and the second pad is a signal pad.

Abstract: An integrated circuit (IC) package includes a substrate and an IC die mounted on a first side of the substrate. The IC package also includes a plurality of capacitors mounted on a second side of the substrate. The second side is opposite to the first side. The IC package further includes a plurality of conductive contact pads formed on the second side of the substrate and interspersed among the capacitors. Other embodiments are described and claimed.

Abstract: An apparatus having a first set of contacts on a first side of the apparatus adapted to interface with a corresponding plurality of contacts on an integrated circuit package. The apparatus further includes a second set of contacts on a second side of the apparatus adapted to interface with a corresponding plurality of grid array leads, and a plurality of capacitive storage structures coupled to the first and second sets of contacts.

Abstract: In some embodiments, an article of manufacture includes a metal layer and a first dielectric layer in contact with a first face of the metal layer. The article of manufacture also includes a second dielectric layer in contact with a second face of the metal layer. The second face of the metal layer is opposite to the first face of the metal layer. The metal layer may be a continuous sheet having slots formed therein to allow the first and second dielectric layers to adhere to each other by way of the slots.

Abstract: A system may include an integrated circuit package having a package power contact and a package ground contact, and an interposer to physically receive a portion of the package and including a lip. A system may also include a first card having a card power contact to interface with the package power contact and a card ground contact to interface with the package ground contact, where the first card defines an opening to receive a portion of the interposer, and the lip is to support a portion of the first card.

Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.

Abstract: A capacitor including a plurality of layers each including a plurality of conductive plates is described. A gap separates conductive plates on a same layer. The conductive plates on a single layer assures that the total capacitance of each layer is not lost if all connections to one plate are defective. Each of the conductive plates includes a plurality of connection points or tabs to provide a redundancy of connections to each plate. The greater the number of connection points in the capacitor the lower the inductance and resistance. The gaps extend in a first direction for a first pair of layers and extend in a second direction for a second pair of layers. Systems connecting the capacitor to a die are also described. The length of the conductive material connecting the capacitor to the die is short, and the inductance and resistance of the conductive material is low.

Abstract: A capacitor including a plurality of layers each including a plurality of conductive plates is described. A gap separates conductive plates on a same layer. The conductive plates on a single layer assures that the total capacitance of each layer is not lost if all connections to one plate are defective. Each of the conductive plates includes a plurality of connection points or tabs to provide a redundancy of connections to each plate. The greater the number of connection points in the capacitor the lower the inductance and resistance. The gaps extend in a first direction for a first pair of layers and extend in a second direction for a second pair of layers. Systems connecting the capacitor to a die are also described. The length of the conductive material connecting the capacitor to the die is short, and the inductance and resistance of the conductive material is low.

Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.

Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.