Abstract: The present invention, generally speaking, provides methods and apparatus for producing an amplitude modulated communications signal, in which a constant-envelope carrier signal is modified in response to a power control signal to produce a modified constant-envelope carrier signal. The modified constant-envelope carrier signal is amplified in response to an amplitude modulation signal to produce a communications signal having amplitude modulation and having an average output power proportional to a signal level of the modified constant-envelope carrier signal. This manner of operation allows wide dynamic range of average output power to be achieved. Because amplitude modulation is applied after amplitude varying circuitry used to produce the modified constant-envelope carrier signal, the amplitude modulation is unaffected by possible non-linearities of such circuitry.

Abstract: Methods and apparatus for fast frequency range selection in ranged controlled oscillators. An exemplary frequency range selection apparatus includes a ranged voltage controlled oscillator (VCO) configured within a frequency control loop (e.g., within a phase-locked loop (PLL)), and a range select controller. The range select controller is configured to receive a phase difference signal from a frequency/phase detector and a fine tuning signal from the output of a loop filter. The range select controller uses the error and fine tuning signals to determine which range setting code should be applied to the range setting input of the VCO. The ability to use information obtained exclusively from the control loop avoids the need to perform a separate open-loop range selection process, as is required in prior art range selection approaches. Because the control loop never needs to be opened, the range selection process is substantially less time consuming compared to prior art approaches.

Abstract: The present invention, generally speaking, achieves noise spreading within a PLL using a dual-modulus prescaler by interleaving the division moduli. Within a given cycle, “ones” and “tens” are not all counted consecutively. Instead, ones and tens are interleaved. In one embodiment of the invention, the R count is doubled and the output of the R counter is toggled between high and low states. (The Q counter may remain unmodified.) In another embodiment of the invention, ones and tens are interleaved in accordance with a ratio q:r. By so interleaving the modulus, the effect is to spread the noise resulting from the output signal of the dual-modulus prescaler over a wider frequency range. The prescaler noise level is greatly reduced, particularly within the frequency band of the reference frequency.

Abstract: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier in such a manner as to achieve a desired modulation. In one embodiment, the spread between a maximum frequency of the desired modulation and the operating frequency of a switch-mode DC-DC converter is reduced by following the switch-mode converter with an active linear regulator. The linear regulator is designed so as to control the operating voltage of the power amplifier with sufficient bandwidth to faithfully reproduce the desired amplitude modulation wave-form. The linear regulator is further designed to reject variations on its input voltage even while the output voltage is changed in response to an applied control signal. This rejection will occur even though the variations on the input voltage are of commensurate or even lower frequency than that of the controlled output variation.

Abstract: A highly-efficient hybrid class-S modulator circuit for a polar modulator includes a class-S path having a digital pulse-width modulator (PWM) generator, which receives the K most significant bits (MSBs) of N-bit digital input words to generate a discrete set of PWM signals. The discrete set of PWM signals drives a buck converter, to provide a modulated power supply voltage signal having a plurality of quantized voltage levels. An error generated by using only K of the N bits of each N-bit word is reduced by dithering the input drive and converting the error to an AC signal. Dithering is performed by feeding the N?K least significant bits (LSBs) of each N-bit input word to an input of a digital oscillator, while feeding the K most significant bits (MSBs) of each word to the PWM generator. The digital oscillator converts the N?K LSBs of each input word into an oscillating single LSB.

Abstract: The present invention, generally speaking, takes advantage of the properties of quadrature signals to achieve precise quadrature alignment in a simple fashion. In particular, the expectation of the product of quadrature signals is zero. In accordance with the teachings of the invention, a phase error detection network therefore operates by multiplying the received quadrature signals and low-pass filtering the product to produce an error signal. When the signals are in precise quadrature relationship, the error signal will be zero. Real-time feedback control may be used to drive the error to zero. In accordance with another aspect of the invention, a variable phase shift network is achieved using a dual delay line. The difference in delay between the two delay lines is adjusted in response to the error signal to obtain precise quadrature alignment. The principles of the invention may be applied in connection with traditional mixer architectures or with switch-mode (e.g., “aliased undersampling”) architectures.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: The present invention, generally speaking, provides methods and apparatus for producing an amplitude modulated communications signal, in which a constant-envelope carrier signal is modified in response to a power control signal to produce a modified constant-envelope carrier signal. The modified constant-envelope carrier signal is amplified in response to an amplitude modulation signal to produce a communications signal having amplitude modulation and having an average output power proportional to a signal level of the modified constant-envelope carrier signal. This manner of operation allows wide dynamic range of average output power to be achieved. Because amplitude modulation is applied after amplitude varying circuitry used to produce the modified constant-envelope carrier signal, the amplitude modulation is unaffected by possible non-linearities of such circuitry.

Abstract: The present invention, generally speaking, achieves noise spreading within a PLL using a dual-modulus prescaler by interleaving the division moduli. Within a given cycle, “ones” and “tens” are not all counted consecutively. Instead, ones and tens are interleaved. In one embodiment of the invention, the R count is doubled and the output of the R counter is toggled between high and low states. (The Q counter may remain unmodified.) In another embodiment of the invention, ones and tens are interleaved in accordance with a ratio q:r. By so interleaving the modulus, the effect is to spread the noise resulting from the output signal of the dual-modulus prescaler over a wider frequency range. The prescaler noise level is greatly reduced, particularly within the frequency band of the reference frequency.

Abstract: The present invention, generally speaking, provides methods and apparatus for producing an amplitude modulated communications signal, in which a constant-envelope carrier signal is modified in response to a power control signal to produce a modified constant-envelope carrier signal. The modified constant-envelope carrier signal is amplified in response to an amplitude modulation signal to produce a communications signal having amplitude modulation and having an average output power proportional to a signal level of the modified constant-envelope carrier signal. This manner of operation allows wide dynamic range of average output power to be achieved. Because amplitude modulation is applied after amplitude varying circuitry used to produce the modified constant-envelope carrier signal, the amplitude modulation is unaffected by possible non-linearities of such circuitry.

Abstract: The present invention, generally speaking, provides a time shift angle demodulator that is of simple construction and has an extended linear range. Range extension is achieved by using the input signals directly, not simply post-processing the S-PFD outputs. In accordance with one embodiment of the invention, a method of measuring the phase or frequency of a periodic input signal uses a periodic reference signal and includes comparing the input signal to the reference signal to obtain a lead signal and a lag signal; changing the count of an up/down counter in dependence on the input signal, the reference signal, the lead signal and the lag signal; and using the lead signal, the lag signal and the count signal to produce a phase or frequency signal.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: An apparatus (135), method and computer program are provided for determining and indicating a quality of a signal received by a first wireless communication device (105) from a second wireless communication device (110). In one embodiment, the apparatus (135) includes a bit-error-rate (BER) circuit (215) for measuring a BER of the signal, a comparator (145) for comparing the BER with a predetermined value to determine a relative signal quality, and an indicator (160) for indicating the quality of the signal to a user of the first device (105). Alternatively, the apparatus (135) includes a circuit for measuring the strength of the signal (230), a calculator (235) for calculating a signal-to-noise ratio (SNR) of the signal using the strength of the signal and a predetermined noise value, and a comparator (145) for comparing the SNR with a predetermined value to determine a relative signal quality.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: The present invention, generally speaking, achieves a highly efficient line driver for high crest-factor signals such as DMT/ADSL signals. In an exemplary embodiment, a digital signal produced by a digital signal processor or the like is processed by a sigma-delta modulator (SDM) to produce one or more binary signal pairs. The signals of a signal pair are low-pass filtered, if necessary, and applied across the winding of a transformer. The transformer has a single secondary winding connected to the line and may has as many primary windings as the number of signal pairs. The transformer may have a unity turns ratio or may have a turns ratio for accomplishing voltage step-up. For one signal pair, the number of possible resulting signals levels on the secondary side is three, for two signal pairs five, etc. Using more than two signal levels, it becomes possible to recreate from the digital signals the corresponding analog waveform with the required accuracy.

Abstract: The present invention, generally speaking, satisfies the foregoing requirements using in combination within a frequency synthesis loop an SDM-based synthesizer and an SDM-based frequency digitizer. Since both blocks are SDM-based, the resulting signals can be differenced and filtered to produce a control signal for an oscillator. Low noise (and low spurs), fine frequency resolution and fast switching times may all be achieved simultaneously.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: An apparatus and method are provided for attenuating an undesired frequency (f1) relative to a desired frequency (f0) in a signal transmitted from an out-put (220) of an active element (210). Generally, the apparatus includes a parallel-resonant trap (145) coupled to the output of the active element (210), the trap including a network of reactive elements (235).

Abstract: The present invention, generally speaking, achieves a highly efficient line driver for high crest-factor signals such as DMT/ADSL signals. In an exemplary embodiment, a digital signal produced by a digital signal processor or the like is processed by a sigma-delta modulator to produce one or more binary signal pairs. The signals of a signal pair are low-pass filtered, if necessary, and applied across the winding of a transformer. The transformer has a single secondary winding connected to the line and may has as many primary windings as the number of signal pairs. The transformer may have a unity turns ratio or may have a turns ratio for accomplishing voltage step-up. For one signal pair, the number of possible resulting signals levels on the secondary side is three, for two signal pairs five, etc. Using more than two signal levels, it becomes possible to recreate from the digital signals the corresponding analog waveform with the required accuracy.