Abstract: A method is for reducing pulse skipping from a characteristic affecting a modulating signal input to an integrator of a pulse width modulation (PWM) modulator, together with a square wave carrier signal for generating a triangular waveform of the PWM modulator. The method may include creating a broad synchronous peak at vertexes of the triangular waveform output by the integrator.

Abstract: In an embodiment, a PWM modulation circuit includes a first circuit block configured to receive a square wave input signal and produce from the square wave input signal a triangular wave signal, a second circuit block configured to receive a modulating signal and produce a PWM signal by comparing the modulating signal with a carrier signal, a switching circuit block coupled between the first circuit block and the second circuit block and sensitive to reference signals having upper and lower reference values and selectively switchable between a carrier transfer setting in which the switching circuit block couples the first circuit block to the second circuit block to transfer the triangular wave signal as the carrier signal, and one or more carrier forcing settings for optimizing or inhibiting pulse skipping in the PWM signal, wherein the switching circuit block forces the carrier signal to the upper and lower reference values, respectively.

Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.

Abstract: A bi-directional switch circuit includes first and second transistors having their control electrodes coupled at a first common node and the current paths coupled at a second common node in an anti-series arrangement. First and second electrical paths coupled between the first common node and the first and second transistors, respectively, include first and second switches switchable between a conductive state and a non-conductive state. A third electrical path between the first and second common nodes includes a third switch switchable between a conductive state and a non-conductive state. The third switch is coupled with the first and second switches by a logical network configured to switch the third switch to the conductive state with the first and second switches switched to the non-conductive state, and to the non-conductive state with either one of the first and second switches switched to the conductive state.

Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.

Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

Abstract: A bi-directional switch circuit includes first and second transistors having their control electrodes coupled at a first common node and the current paths coupled at a second common node in an anti-series arrangement. First and second electrical paths coupled between the first common node and the first and second transistors, respectively, include first and second switches switchable between a conductive state and a non-conductive state. A third electrical path between the first and second common nodes includes a third switch switchable between a conductive state and a non-conductive state. The third switch is coupled with the first and second switches by a logical network configured to switch the third switch to the conductive state with the first and second switches switched to the non-conductive state, and to the non-conductive state with either one of the first and second switches switched to the conductive state.

Abstract: A switching circuit includes a switching circuit stage configured to supply a load via filter networks. Control circuitry is provided to control alternate switching sequences of transistors in the half-bridges of the switching circuit stage. A current flow line is provided between the output nodes of the half-bridges including an inductance between two switches. First and second capacitances are coupled with the output nodes of the half-bridges. The control circuitry switches first and second switches to the conductive state at intervals in the alternate switching sequences of the transistors in the half-bridges between switching the first pair of transistors to a non-conductive state and switching the second pair of transistors to a conductive state.

Abstract: In an embodiment, a PWM modulation circuit includes a first circuit block configured to receive a square wave input signal and produce from the square wave input signal a triangular wave signal, a second circuit block configured to receive a modulating signal and produce a PWM signal by comparing the modulating signal with a carrier signal, a switching circuit block coupled between the first circuit block and the second circuit block and sensitive to reference signals having upper and lower reference values and selectively switchable between a carrier transfer setting in which the switching circuit block couples the first circuit block to the second circuit block to transfer the triangular wave signal as the carrier signal, and one or more carrier forcing settings for optimizing or inhibiting pulse skipping in the PWM signal, wherein the switching circuit block forces the carrier signal to the upper and lower reference values, respectively.

Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.

Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.

Abstract: A method is for reducing pulse skipping from a characteristic affecting a modulating signal input to an integrator of a pulse width modulation (PWM) modulator, together with a square wave carrier signal for generating a triangular waveform of the PWM modulator. The method may include creating a broad synchronous peak at vertexes of the triangular waveform output by the integrator.

Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.

Abstract: A method is for reducing pulse skipping from a characteristic affecting a modulating signal input to an integrator of a pulse width modulation (PWM) modulator, together with a square wave carrier signal for generating a triangular waveform of the PWM modulator. The method may include creating a broad synchronous peak at vertexes of the triangular waveform output by the integrator.

Abstract: A circuit includes a final stage that includes an H-bridge comprising first and second half-bridges. A read circuit is configured to read a load current supplied by a class-D audio-amplifier to a load. The read circuit is configured for estimating the load current by reading a current at an output by the first or second half-bridge by measuring a drain-to-source voltage during an ON period of a power transistor of the H-bridge. A sensing circuit is configured to detect a first drain-to-source voltage from a transistor of the first half-bridge and a second drain-to-source voltage from a corresponding transistor of the second half-bridge. The sensing circuit is also configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage and to perform an averaging operation on the difference to obtain a sense voltage value to be supplied to an analog-to-digital converter.

Abstract: A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.

Abstract: A voltage-current converter includes a first input stage and a second input stage with a first transistor and a second transistor driven by the first input stage and by the second input stage, respectively. First and second current generators are coupled to current lines of the first transistor and of the second transistor. At least one resistor couples the current lines of the first transistor and of the second transistor, where the ends of the aforesaid resistor are coupled to feedback terminals of the input stages so that an input voltage applied between voltage input terminals of the input stages is converted into a current on respective current output terminals of the converter. The converter includes switching circuits for coupling the first and second current generators alternately to the current line of the first transistor and to the current line of the second transistor.

Abstract: A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.

Abstract: A voltage-current converter includes a first input stage and a second input stage with a first transistor and a second transistor driven by the first input stage and by the second input stage, respectively. First and second current generators are coupled to current lines of the first transistor and of the second transistor. At least one resistor couples the current lines of the first transistor and of the second transistor, where the ends of the aforesaid resistor are coupled to feedback terminals of the input stages so that an input voltage applied between voltage input terminals of the input stages is converted into a current on respective current output terminals of the converter. The converter includes switching circuits for coupling the first and second current generators alternately to the current line of the first transistor and to the current line of the second transistor.

Abstract: A circuit includes a final stage that includes an H-bridge comprising first and second half-bridges. A read circuit is configured to read a load current supplied by a class-D audio-amplifier to a load. The read circuit is configured for estimating the load current by reading a current at an output by the first or second half-bridge by measuring a drain-to-source voltage during an ON period of a power transistor of the H-bridge. A sensing circuit is configured to detect a first drain-to-source voltage from a transistor of the first half-bridge and a second drain-to-source voltage from a corresponding transistor of the second half-bridge. The sensing circuit is also configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage and to perform an averaging operation on the difference to obtain a sense voltage value to be supplied to an analog-to-digital converter.