Patents by Inventor Edoardo Campini

Edoardo Campini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150205748
    Abstract: A telecommunications chassis includes an array of mezzanine card interfaces and a carrier module coupled to the mezzanine card interfaces to control and manage mezzanine cards connected to the mezzanine card interfaces.
    Type: Application
    Filed: December 15, 2014
    Publication date: July 23, 2015
    Applicant: Intel Corporation
    Inventors: Edoardo Campini, Steven Denies, Mark Summers, Lawson Guthrie
  • Patent number: 8913379
    Abstract: A telecommunications chassis includes an array of mezzanine card interfaces and a carrier module coupled to the mezzanine card interfaces to control and manage mezzanine cards connected to the mezzanine card interfaces.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Steven Denies, Mark Summers, Lawson Guthrie
  • Publication number: 20130301208
    Abstract: Embodiments are generally directed to a method and apparatus to couple a module to a management controller on an interconnect. In one embodiment, a method includes detecting that a module has coupled to an interconnect, the interconnect coupled to a modular platform backplane. The method further includes logically coupling the module to one of a plurality of management controllers resident on the interconnect, each management controller logically appears as a management controller for different interconnects coupled to the modular platform backplane.
    Type: Application
    Filed: January 3, 2013
    Publication date: November 14, 2013
    Inventors: Edoardo Campini, Steven Denies, Mark Summers, Lawson Guthrie
  • Patent number: 8498309
    Abstract: A data transport module includes a connector to be received and coupled to a backplane within a modular platform. The data transport module also includes another connector to be received and coupled in a slot resident on a board such that the data transport module is coplanar to the board when received and coupled in the slot. The data transport module further includes one or more data transport interfaces to forward data between the board and the backplane via the connectors.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: July 30, 2013
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, David Formisano, Marwan Khoury, Bradley T. Herrin
  • Patent number: 8351198
    Abstract: Embodiments are generally directed to a method and apparatus to couple a module to a management controller on an interconnect. In one embodiment, a method includes detecting that a module has coupled to an interconnect, the interconnect coupled to a modular platform backplane. The method further includes logically coupling the module to one of a plurality of management controllers resident on the interconnect, each management controller logically appears as a management controller for different interconnects coupled to the modular platform backplane.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: January 8, 2013
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Steven DeNies, Mark Summers, Lawson Guthrie
  • Patent number: 7941699
    Abstract: Techniques that determine a strict subset of multiple processor cores from a set of multiple functional processor cores integrated within a single integrated circuit package. The determined strict subset of multiple processor cores differs from a previously determined strict subset of multiple processor cores from the set of multiple functional processor cores used to initiate an immediately previous core booting. In response to a processor reset, booting of the strict subset of multiple processor cores is initiated. Also, support for selecting multiple modes of operations, either supporting fault tolerance or extended life.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: May 10, 2011
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Shailesh Chaudhry, Frank Geoffrey Gates
  • Patent number: 7751333
    Abstract: Embodiments are generally directed to a method and apparatus to couple a module to a management controller on an interconnect. In one embodiment, a method includes detecting that a module has coupled to an interconnect, the interconnect coupled to a modular platform backplane. The method further includes logically coupling the module to one of a plurality of management controllers resident on the interconnect, each management controller logically appears as a management controller for different interconnects coupled to the modular platform backplane.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Steven DeNies, Mark Summers, Lawson Guthrie
  • Patent number: 7714433
    Abstract: In one embodiment, the present invention includes a semiconductor package having a plurality of fan blades embedded within a first surface of the package, where a first group of the fan blades extend from a first side of the package and a second group of the fan blades extend from a second side of semiconductor package. The fan blades may be powered by piezoelectric devices to cause motion of the fan blades. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: May 11, 2010
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Javier Leija, William Handley
  • Patent number: 7715208
    Abstract: A configurable multi-faceted input/output (I/O) panel may be used in a computer or electronic device to present multiple I/O interfaces to a user. The configurable multi-faceted I/O panels may be configured by a user such that one of a plurality of different I/O faces is accessible to the user. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: May 11, 2010
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Javier Leija, William Handley
  • Publication number: 20100110645
    Abstract: Embodiments are generally directed to a method and apparatus to couple a module to a management controller on an interconnect. In one embodiment, a method includes detecting that a module has coupled to an interconnect, the interconnect coupled to a modular platform backplane. The method further includes logically coupling the module to one of a plurality of management controllers resident on the interconnect, each management controller logically appears as a management controller for different interconnects coupled to the modular platform backplane.
    Type: Application
    Filed: October 14, 2009
    Publication date: May 6, 2010
    Inventors: Edoardo Campini, Steven DeNies, Mark Summers, Lawson Guthrie
  • Patent number: 7631133
    Abstract: An apparatus, method, computer program product, integrated circuit and system that include a backplane that provides direct and indirect connections among a plurality of slots in communication with the backplane. The backplane is also complies with a telecommunication architecture specification. The slots include at least a source slot, an intermediate slot and a destination slot. The intermediate slot may receive a first data set from the source slot via the backplane. The intermediate slot sends the first data set to the destination slot via the backplane.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: December 8, 2009
    Assignee: Intel Corporation
    Inventors: Hassan Fallah-Adl, Edoardo Campini, David Formisano
  • Publication number: 20090240979
    Abstract: Techniques that determine a strict subset of multiple processor cores from a set of multiple functional processor cores integrated within a single integrated circuit package. The determined strict subset of multiple processor cores differs from a previously determined strict subset of multiple processor cores from the set of multiple functional processor cores used to initiate an immediately previous core booting. In response to a processor reset, booting of the strict subset of multiple processor cores is initiated. Also, support for selecting multiple modes of operations, either supporting fault tolerance or extended life.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: Edoardo Campini, Shailesh Chaudhry, Frank Geoffrey Gates
  • Patent number: 7551446
    Abstract: A thermal management device attachment apparatus may be used to thermally couple a thermal management device to a heat generating component on a circuit board. The attachment apparatus may include a support member mounted on the same side of the circuit board as the heat generating component and extending around at least a portion of the component. The support member may include a circuit board mounting portion, a thermal management mounting portion and a side portion extending between the circuit board mounting portion and the thermal management mounting portion. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: June 23, 2009
    Assignee: Intel Corporation
    Inventors: William Handley, Edoardo Campini, Javier Leija
  • Patent number: 7539184
    Abstract: A reconfigurable interconnect/switch for selectably coupling network devices, media, and switch fabric. The reconfigurable interconnect/switch enables network devices, such as network processor units (NPUs) to selectively communicate with other NPUs, media (via a media interface), and switch fabric (via a switch fabric interface), thus providing flexibility in the use of network line cards and the like. Embodiments of the switching/routing scheme may be employed to support network devices having separate media and/or switch fabric interfaces, as well as network devices having selectable media switch fabric (MSF) interfaces that share signal lines.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 26, 2009
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Douglas Lee Stahl, David R. Formisano
  • Patent number: 7525219
    Abstract: A method to couple a module to a board including power circuitry. The method includes detecting a module's power requirements before providing payload power to the module and routing a regulated power level to the module via at least one power feed based on the detected power requirements. The regulated power is provided by the board's power circuitry.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: April 28, 2009
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, William Handley, Javier Leija
  • Patent number: 7487280
    Abstract: Information is obtained from a module received in a slot in a chassis. The information includes a number of ports in one or more module connectors which route at least one communication channel associated with a communication interfaces on the module. A determination is made as to the number of ports the slot has a capability to route the at least one communication channel to one or more backplanes in the chassis and to another module received in another slot in the chassis. A given number of ports in the one or more module connectors are enabled to forward data from the communication interface on the module and through the at least one communication channel to the other module based on the determination.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: February 3, 2009
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Douglas P. Bogia, Robert J. Albers
  • Patent number: 7458815
    Abstract: A chassis includes a plurality of slots to receive modules. The chassis further includes a first backplane to couple to modules that are received in the plurality of slots. The modules are to couple to the first backplane via a first communication interface on each module. The chassis also includes a second backplane to couple to at least a subset of the modules via a second communication interface on each of the subset of modules. One of the backplanes may be located in an upper or lower air plenum and used to interconnect modules slid along the slots from opposite directions. Some of the module connectors may be retractable to enable the modules to move into the chassis. The interface may be electrical, optical inductive or capacitive.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: December 2, 2008
    Assignee: Intel Corporation
    Inventors: Hassan Fallah-Adl, Edoardo Campini, Robert J. Albers
  • Patent number: 7450796
    Abstract: An apparatus and system includes a radiation generation device for generating radiation and a radiation detection device. A first radiation channel is optically-coupled on a first end to the radiation generation device and configured to direct the radiation generated by the radiation generation device to a second end of the first radiation channel. A second radiation channel is optically-coupled on a first end to the radiation detection device and configured to direct radiation from a second end of the second radiation channel to the radiation detection device. An optical switch is configured to selectively interrupt the transmission of radiation from the second end of the first radiation channel to the second end of the second radiation channel.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: November 11, 2008
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Steven DeNies, William Handley, Lawson Guthrie
  • Publication number: 20080229053
    Abstract: In one embodiment, the present invention includes a system including a processor to access a maximum memory space of a first size using a memory address having a first length, a chipset coupled to the processor to interface the processor to a memory including a physical memory space, where the chipset is to access a maximum memory space larger than the first maximum memory space, and a virtual machine monitor (VMM) to enable the processor to access the full physical memory space of a memory. Other embodiments are described and claimed.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 18, 2008
    Inventors: Edoardo Campini, Javier Leija
  • Publication number: 20080217764
    Abstract: In one embodiment, the present invention includes a semiconductor package having a plurality of fan blades embedded within a first surface of the package, where a first group of the fan blades extend from a first side of the package and a second group of the fan blades extend from a second side of semiconductor package. The fan blades may be powered by piezoelectric devices to cause motion of the fan blades. Other embodiments are described and claimed.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Inventors: Edoardo Campini, Javier Leija, William Handley