Abstract: In one embodiment, the present invention includes a semiconductor device mounted to a first side of a circuit board; and at least one voltage regulator device mounted to a second side of the circuit board, the second side opposite to the first side. Examples of the voltage regulator devices include output filters, inductors, capacitors, and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device.

Abstract: In one embodiment, the present invention includes a method of mounting a semiconductor device to a first side of a circuit board; and mounting at least one voltage regulator device to a second side of the circuit board, the second side opposite to the first side. The voltage regulator devices may be output filters, inductors, capacitors, and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device.

Abstract: In one embodiment, a multi-phase power supply controller is configured to an operating status signal and responsively inhibit the PWM controller from forming at least one PWM drive signal of a plurality of PWM drive signals.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: In one embodiment, a multi-phase power supply controller is configured to an operating status signal and responsively inhibit the PWM controller from forming at least one PWM drive signal of a plurality of PWM drive signals.

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: A voltage regulator has an output path to couple to a load. A first sense point at a first sense location on the output path is to sense a first feedback signal for the voltage regulator. And, a second sense point at a second sense location on the output path is to sense a second feedback signal for the voltage regulator.

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract: Embodiments of the present invention describe a system and method for microprocessor power regulation. An appropriate amount of voltage is provided to a microprocessor based on a voltage identifier (VID) received by a voltage controller from the microprocessor via a serial communication line. A voltage identifier clock signal (VIDClock) is used for the timing of transmission and receipt of data/acknowledgement signals. A guard clock signal (VIDGuard) is provided via a separate guard clock line to prevent potential noise on the clock line from causing a clock signal misidentification, which could cause a wrong value to be received as the VID. VIDGuard is analyzed in relation to ViDClock to verify the value of the clock signal. To verify receipt of the VID data, a voltage identifier acknowledgement line (VIDAck) is transmitted from the voltage regulator to the microprocessor. The acknowledgement signal is checked by a two-part receipt verification, high-to-low and low-to-high.

Abstract: A dynamic processor configuration and power-up programs a processor's fuse block with configuration signals during processor manufacturing. The processor configuration signals include a core voltage identifier and a system bus frequency identifier. When power is applied to the platform, a control signal is used to prevent power-up of the platform's processor related circuitry. While the platform awaits full power-up, the fuse block is powered up. When the fuse block is powered up, the control signal is used to allow the configuration signals to be read from the fuse block. The processor is configured with core voltage and system bus frequency based on the values read from the fuse block. The platform then performs its boot-up sequence.

Abstract: Multistage configuration and power setting for a processor includes an on-die configuration signal fuse block programmed during manufacturing, configuration signal Control and I/O circuitry, a configuration change control signal output indicating when the configuration signals are going to change, and voltage regulators and clock generators that rely on the configuration change control signal to begin the system configuration change and boot sequences. The processor actively drives its configuration signal states. Multistage configuration and power setting also enables the processor to change its configuration states during operation.

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract: A system and method for microprocessor power regulation. The present invention provides an appropriate amount of voltage to a microprocessor based on a voltage identifier (VID) received by a voltage controller from said microprocessor via a serial communication line.