Patents by Inventor Edward P. Osburn

Edward P. Osburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6472899
    Abstract: The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: October 29, 2002
    Assignee: Intel Corporation
    Inventors: Edward P. Osburn, Michael A. Stapleton
  • Publication number: 20020144036
    Abstract: Multistage configuration and power setting for a processor includes an on-die configuration signal fuse block programmed during manufacturing, configuration signal Control and I/O circuitry, a configuration change control signal output indicating when the configuration signals are going to change, and voltage regulators and clock generators that rely on the configuration change control signal to begin the system configuration change and boot sequences. The processor actively drives its configuration signal states. Multistage configuration and power setting also enables the processor to change its configuration states during operation.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 3, 2002
    Inventors: Edward P. Osburn, Gregory F. Taylor, Ananda Sarangi
  • Publication number: 20020120882
    Abstract: A dynamic processor configuration and power-up programs a processor's fuse block with configuration signals during processor manufacturing. The processor configuration signals include a core voltage identifier and a system bus frequency identifier. When power is applied to the platform, a control signal is used to prevent power-up of the platform's processor related circuitry. While the platform awaits full power-up, the fuse block is powered up. When the fuse block is powered up, the control signal is used to allow the configuration signals to be read from the fuse block. The processor is configured with core voltage and system bus frequency based on the values read from the fuse block. The platform then performs its boot-up sequence.
    Type: Application
    Filed: February 26, 2001
    Publication date: August 29, 2002
    Inventors: Ananda Sarangi, Rachael Jade Parker, Edward P. Osburn, Gregory F. Taylor
  • Patent number: 6430043
    Abstract: A electromagnetic interference (EMI) grounding unit provides an electrical connection between a heat sink and a ground formed on a substrate. A tab mechanically and electrically continuous with an electrically conductive generally planar member makes electrical contact with the heat sink. The electrically conductive generally planar member is connected to one or more conductive posts. And the one or more conductive posts are connected to the ground. An electrical charge on the heat sink is discharged along a path that includes the tab, the electrically conductive generally planar member, and the one or more posts. Discharging accumulated charge on the heat sink to ground reduces EMI generated by re-radiation of electromagnetic energy from the heat sink.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: August 6, 2002
    Assignee: Intel Corporation
    Inventor: Edward P. Osburn
  • Publication number: 20020084798
    Abstract: The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.
    Type: Application
    Filed: December 29, 2000
    Publication date: July 4, 2002
    Inventors: Edward P. Osburn, Michael A. Stapleton