Patents by Inventor Edward R. Caudel

Edward R. Caudel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6108765
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device (10) having separate on-chip program ROM (14) and data RAM (15), with separate address and data paths for program and data. An external program address bus (RA) allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus (D). A bus interchange module (BIM) allows transfer between the separate internal program and data busses (P-Bus and D-Bus) in special circumstances. The internal busses are 16-bit, while the ALU and accumulator (Acc) are 32-bit. A multiplier circuit (M) produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter (S) with sign extension.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: August 22, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 6000025
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: December 7, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5854907
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: December 29, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5828896
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: October 27, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5826111
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device (10) having separate on-chip program ROM (14) and data RAM (15), with separate address and data paths for program and data. An external program address bus (RA) allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus (D). A bus interchange module (BIM) allows transfer between the separate internal program and data busses (P-Bus and D-Bus) in special circumstances. The internal busses are 16-bit, while the ALU and accumulator (Acc) are 32-bit. A multiplier circuit (M) produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter (S) with sign extension.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 20, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5625838
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0- to -15 bit shifter with sign extension.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 29, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5615383
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 25, 1997
    Assignee: Texas Instruments
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 5581792
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device (10) having separate on-chip program ROM (14) and data RAM (15), with separate address and data paths for program and data. An external program address bus (RA) allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus (D). A bus interchange module (BIM) allows transfer between the separate internal program and data buses (P-Bus and D-Bus) in special circumstances. The internal buses are 16-bit, while the ALU and accumulator (Acc) are 32-bit. A multiplier circuit (M) produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter (S) with sign extension.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: December 3, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 4713748
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program and data memory, with separate address and data paths for program and data. An external program address bus allows off-chip program fitch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. The on-chip program memory may be a RAM and this additional RAM may be configured as either program or data memory space.
    Type: Grant
    Filed: February 12, 1985
    Date of Patent: December 15, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Surendar S. Magar, Daniel L. Essig, Richard D. Simpson, Edward R. Caudel
  • Patent number: 4608634
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data; however, the accumulator in the data path may be used as a program address source. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. A separate shift or offset is provided in coupling the output of the accumulator to an internal data bus for use in scaling when storing the accumulator contents in internal data RAM specified by instructions.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: August 26, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar, Wanda K. Gass
  • Patent number: 4586131
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. The data RAM has an internal shift arrangement useful in processing convolution algorithms. An addressed location in the RAM is read out and also shifted to the next higher location in one instruction cycle.
    Type: Grant
    Filed: September 26, 1984
    Date of Patent: April 29, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar, Antony W. Leigh
  • Patent number: 4577282
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: March 18, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar
  • Patent number: 4533992
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: August 6, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Surendar S. Magar, Edward R. Caudel
  • Patent number: 4514801
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data; however, the accumulator in the data path may be used as a program address source for table-read and table-write, for example. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances, such as accumulator addressing. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: April 30, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Gary L. Swoboda, Surendar S. Magar, Kevin C. McDonough, Antony W. Leigh
  • Patent number: 4498135
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data; however, the accumulator in the data path may be used as a program address source for table look-up, for example. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances, such as accumulator addressing. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: February 5, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Edward R. Caudel
  • Patent number: 4491910
    Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. The data RAM has an internal shift arrangement useful in processing convolution algorithms. An addressed location in the RAM is read out and also shifted to the next higher location in one instruction cycle.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: January 1, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, Surendar S. Magar, Antony W. Leigh
  • Patent number: 4349894
    Abstract: An MOS memory cell of the static type employs a pair of cross-coupled driver transistors forming a bistable circuit, with load resistors replaced by a pair of series coupling transistors connecting storage nodes to complementary precharged data lines. A two phase clock turns on the coupling transistors in sequence, for refresh, so an intermediate node is charged during a first phase and discharged into the storage nodes during the second phase. Both transistors are turned on at the same time for read or write operations.
    Type: Grant
    Filed: November 24, 1980
    Date of Patent: September 14, 1982
    Assignee: Texas Instruments Incorporated
    Inventor: Edward R. Caudel
  • Patent number: 4236229
    Abstract: An MOS memory cell of the static type employs a pair of cross-coupled driver transistors forming a bistable circuit, with load resistors replaced by a pair of series coupling transistors connecting storage nodes to complementary precharged data lines. A two phase clock turns on the coupling transistors in sequence, for refresh, so an intermediate node is charged during a first phase and discharged into the storage nodes during the second phase. Both transistors are turned on at the same time for read or write operations.
    Type: Grant
    Filed: July 19, 1978
    Date of Patent: November 25, 1980
    Assignee: Texas Instruments Incorporated
    Inventor: Edward R. Caudel
  • Patent number: 4161697
    Abstract: A radio receiver receives input signals comprised of a plurality of frequency bands lying respectively within a plurality of non-overlapping frequency channels. The signals include an itermittently present reference frequency signal. The radio receiver includes an autolock circuit for measuring the frequency of the intermittently present carrier and for generating digital signals indicating its frequency. A digital processor has inputs coupled to receive the digital signals for calculating in response thereto a selectable demodulating frequency dependent upon the frequency of the intermittently present carrier.
    Type: Grant
    Filed: April 27, 1977
    Date of Patent: July 17, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Michael J. Cochran, Edward R. Caudel
  • Patent number: 4147984
    Abstract: A transceiver includes a keyboard having a plurality of manually actuable keys for selecting operating modes and channels for operating thereon. A first digital processor has inputs coupled to the keyboard for receiving logic signals therefrom of a first format identifying the keys which are manually actuated. In response thereto, the first digital processor generates bit serial messages of a second format indicating the manually chosen operating mode and channel. A second digital processor has inputs coupled to receive the bit serial messages. In response thereto, the second digital processor generates a plurality of micro commands. A clocking signal generator circuit and switching circuit are coupled to receive the micro commands to control the transceiver.
    Type: Grant
    Filed: April 27, 1977
    Date of Patent: April 3, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Edward R. Caudel, William R. Wilson, Thomas E. Merrow