Patents by Inventor Edward Yi Chang
Edward Yi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250253776Abstract: A bidirectional voltage conversion device includes a first half-bridge switching circuit, a transformer, a first resonant capacitor, a double-pole double-throw relay, a second half-bridge switching circuit, a resonant inductor and a second resonant capacitor. The first half-bridge switching circuit is coupled to a high-voltage power storage device. The first resonant capacitor is coupled to the first half-bridge switching circuit and a primary winding. The double-pole double-throw relay is coupled to a first secondary winding, a second secondary winding and a grounding terminal. The second half-bridge switching circuit is coupled to a low-voltage power storage device. The resonant inductor and the second resonant capacitor are coupled in series between the second half-bridge switching circuit and a node between the first secondary winding and the second secondary winding.Type: ApplicationFiled: July 9, 2024Publication date: August 7, 2025Applicant: National Yang Ming Chiao Tung UniversityInventors: Wei-Hua CHIENG, Edward Yi CHANG, Stone CHENG, Ching-Yao LIU, Yueh-Tsung SHIEH, Li-Chuan TANG, Chih-Chiang WU, Wen-Yuh SHIEH, Chi-Chun HUANG, Gang-Ting LIOU
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Patent number: 12347678Abstract: A MOCVD method for growing an InAlGaN/GaN heterostructure comprises steps: sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on a substrate; using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C. in the same reaction chamber. Thereby is achieved a SiNx/InAlGaN/GaN heterostructure having an ultrathin barrier layer, which is suitable to fabricate HEMT elements. The present invention needn't take sample out of the reaction chamber and thus can prevent the heterostructure from oxidation and damage.Type: GrantFiled: January 9, 2023Date of Patent: July 1, 2025Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Edward Yi Chang, You-Chen Weng, Xia-Xi Zheng
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Publication number: 20250072025Abstract: A method for manufacturing a high electron mobility transistor (HEMT), which comprises the following steps: providing a substrate, wherein a semiconductor layer is formed on the substrate, and a source electrode and a drain electrode are formed on the semiconductor layer; forming a passivation layer on the source electrode and the drain electrode; etching the passivation layer to form a through hole between the source electrode and the drain electrode, wherein a region of the semiconductor layer is exposed through the through hole; forming a photoresist layer on the passivation layer, wherein a first sub-region of the region of the semiconductor layer is covered by the photoresist layer, and a second sub-region of the region of the semiconductor layer is not covered by the photoresist layer; forming a metal layer on the second sub-region to form a gate electrode; and removing the passivation layer.Type: ApplicationFiled: December 14, 2023Publication date: February 27, 2025Inventors: Edward Yi CHANG, Yueh-Chin LIN, He-Yu YANG, Howie TSENG
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Patent number: 12155256Abstract: The present disclosure provides a fast charging driver. The fast charging driver is configured to charge a battery of an electronic device. The fast charging driver includes a fast charging circuit and a charging controller. The fast charging circuit includes a first depletion-type GaN transistor, a first enhancement-type field effect transistor, a second depletion-type GaN transistor and a second enhancement-type field effect transistor. The charging controller is configured to control the fast charging circuit to operate in a constant current mode or a constant voltage mode according to a battery level of the battery. By utilizing the first depletion-type GaN transistor and the second depletion-type GaN transistor with a characteristic of a relatively low switching loss, the power consumption during charging the battery by the fast charging driver is decreased to improve the charge speed.Type: GrantFiled: April 27, 2022Date of Patent: November 26, 2024Assignee: National Yang Ming Chiao Tung UniversityInventors: Edward Yi Chang, Stone Cheng, Wei-Hua Chieng, Shyr-Long Jeng, Chih-Chiang Wu
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Patent number: 12088114Abstract: An inductive resonant wireless charging system includes a resonant wireless charging transmitting device, a wireless charging relay device and an inductive wireless charging receiving device. The resonant wireless charging transmitting device transmits a high-frequency radio frequency wave. The wireless charging relay device receives the high-frequency radio frequency wave using an electromagnetic resonance way, and converts the high-frequency radio frequency wave into a low-frequency radio frequency wave to transmit the low-frequency radio frequency wave. The inductive wireless charging receiving device receives the low-frequency radio frequency wave in a manner of electromagnetic induction.Type: GrantFiled: September 10, 2021Date of Patent: September 10, 2024Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Edward Yi Chang, Stone Cheng, Wei-Hua Chieng, Shyr-Long Jeng, Ching-Yao Liu, Li-Chuan Tang
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Publication number: 20240234538Abstract: A high electron mobility transistor and a method for fabricating the same is disclosed. Firstly, a lattice matching layer, a channel layer, and an AlGaN layer are sequentially formed on a growth substrate. The AlGaN layer includes a first area, a second area, and a third area, wherein the second area is located between the first area and the third area. Then, an insulation block is formed on the second area of the AlGaN layer and two GaN blocks are respectively formed on the first area and the third area of the AlGaN layer. Two InAlGaN blocks are respectively formed on the GaN blocks and the insulation block is removed. Finally, a gate is formed to interfere the second area of the AlGaN layer and a source and a drain are respectively formed on the InAlGaN blocks.Type: ApplicationFiled: January 13, 2023Publication date: July 11, 2024Applicants: National Yang Ming Chiao Tung University, National Chung-Shan Institute of Science and TechnologyInventors: Edward Yi CHANG, You-Chen WENG, Min-Lu Kao
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Publication number: 20240234561Abstract: A high electron mobility transistor includes a growth substrate, a lattice matching layer, an back-barrier layer, an electron blocking layer, a channel layer, an active layer, a source, a gate, and a drain. The lattice matching layer and the back-barrier layer are formed on the growth substrate. The back-barrier layer includes GaN doped with C. The electron blocking layer is formed on the back-barrier layer. The electron blocking layer includes AlGaN, wherein the doping percent of Al atoms of the AlGaN is 3˜5% and the doping percent of Ga atoms of the AlGaN is 95˜97%. The electron blocking layer has a thickness of 2˜5 nm. The channel layer and the active layer are formed on the electron blocking layer. The source, the gate, and the drain are formed on the active layer.Type: ApplicationFiled: January 13, 2023Publication date: July 11, 2024Applicants: National Yang Ming Chiao Tung University, National Chung-Shan Institute of Science and TechnologyInventors: Edward Yi CHANG, You-Chen WENG, Min-Lu KAO
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Publication number: 20240213020Abstract: A MOCVD method for growing an InAlGaN/GaN heterostructure comprises steps: sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on a substrate; using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C. in the same reaction chamber. Thereby is achieved a SiNx/InAlGaN/GaN heterostructure having an ultrathin barrier layer, which is suitable to fabricate HEMT elements. The present invention needn't take sample out of the reaction chamber and thus can prevent the heterostructure from oxidation and damage.Type: ApplicationFiled: January 9, 2023Publication date: June 27, 2024Applicant: National Yang Ming Chiao Tung UniversityInventors: Edward Yi CHANG, You-Chen WENG, Xia-Xi Zheng
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Publication number: 20240194742Abstract: A GaN transistor is provided, which comprises: a substrate; a GaN layer disposed on the substrate; a barrier layer disposed on the GaN layer; a source electrode disposed on the barrier layer; a drain electrode disposed on the barrier layer; a composite dielectric layer disposed on the barrier layer and comprising a first seed layer and a La-doped HZO layer, wherein the first seed layer comprises ZrO2; and a gate electrode disposed on the composite dielectric layer.Type: ApplicationFiled: February 27, 2023Publication date: June 13, 2024Inventors: Edward Yi CHANG, Jui-Sheng WU
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Publication number: 20240145575Abstract: A semiconductor device includes a substrate, a channel layer, a first barrier layer, a source/drain contact, and a gate layer. The channel layer is on the substrate. The first barrier layer is on the channel layer and the thickness of the first barrier layer is less than 6 nm. The source/drain contact is on the first barrier layer and is directly contact with the first barrier layer. The gate layer is over the first barrier layer.Type: ApplicationFiled: May 3, 2023Publication date: May 2, 2024Inventors: Edward Yi CHANG, You-Chen WENG, Min-Lu KAO
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Publication number: 20240136422Abstract: A high electron mobility transistor and a method for fabricating the same is disclosed. Firstly, a lattice matching layer, a channel layer, and an AlGaN layer are sequentially formed on a growth substrate. The AlGaN layer includes a first area, a second area, and a third area, wherein the second area is located between the first area and the third area. Then, an insulation block is formed on the second area of the AlGaN layer and two GaN blocks are respectively formed on the first area and the third area of the AlGaN layer. Two InAlGaN blocks are respectively formed on the GaN blocks and the insulation block is removed. Finally, a gate is formed to interfere the second area of the AlGaN layer and a source and a drain are respectively formed on the InAlGaN blocks.Type: ApplicationFiled: January 13, 2023Publication date: April 25, 2024Applicants: National Yang Ming Chiao Tung University, National Chung-Shan Institute of Science and TechnologyInventors: Edward Yi CHANG, You-Chen WENG, Min-Lu Kao
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Publication number: 20240136432Abstract: A high electron mobility transistor includes a growth substrate, a lattice matching layer, an back-barrier layer, an electron blocking layer, a channel layer, an active layer, a source, a gate, and a drain. The lattice matching layer and the back-barrier layer are formed on the growth substrate. The back-barrier layer includes GaN doped with C. The electron blocking layer is formed on the back-barrier layer. The electron blocking layer includes AlGaN, wherein the doping percent of Al atoms of the AlGaN is 3˜5% and the doping percent of Ga atoms of the AlGaN is 95˜97%. The electron blocking layer has a thickness of 2˜5 nm. The channel layer and the active layer are formed on the electron blocking layer. The source, the gate, and the drain are formed on the active layer.Type: ApplicationFiled: January 13, 2023Publication date: April 25, 2024Applicants: National Yang Ming Chiao Tung University, National Chung-Shan Institute of Science and TechnologyInventors: Edward Yi CHANG, You-Chen WENG, Min-Lu KAO
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Publication number: 20230261083Abstract: A method of manufacturing a semiconductor device includes providing a substrate. A channel layer is formed on the substrate. A barrier layer is formed on the channel layer. A source and a drain are formed on the barrier layer. A recess is formed in the barrier layer, in which the recess has a bottom surface, and a portion of the barrier underneath the recess has a thickness. A first dielectric layer is formed to cover the bottom surface of the recess. A charge trapping layer is formed on the first dielectric layer. A first ferroelectric material layer is formed on the charge trapping layer. A second dielectric layer is formed on the first ferroelectric material layer. A second ferroelectric material layer is formed on the second dielectric layer. A gate is formed over the second ferroelectric material layer.Type: ApplicationFiled: April 20, 2023Publication date: August 17, 2023Inventors: Edward Yi CHANG, Shih-Chien LIU, Chung-Kai HUANG, Chia-Hsun WU, Ping-Cheng HAN, Yueh-Chin LIN, Ting-En HSIEH
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Patent number: 11670699Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a ferroelectric composite material layer, a gate, a source and a drain. The channel layer and the barrier layer having a recess are disposed on the substrate in sequence. The ferroelectric composite material layer including a first dielectric layer, a charge trapping layer, a first ferroelectric material layer, a second dielectric layer and a second ferroelectric material layer is disposed in the recess. The gate is disposed on the ferroelectric composite material layer. The source and the drain are disposed on the barrier layer.Type: GrantFiled: March 4, 2020Date of Patent: June 6, 2023Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Edward Yi Chang, Shih-Chien Liu, Chung-Kai Huang, Chia-Hsun Wu, Ping-Cheng Han, Yueh-Chin Lin, Ting-En Hsieh
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Publication number: 20230143658Abstract: A power module includes: a GaN transistor, an NMOS transistor, a first capacitor, a first diode and a second diode. The NMOS transistor is electrically connected to the GaN transistor. A negative electrode of the first capacitor is electrically connected to an anode of the first diode and a gate of the GaN transistor. A cathode of the second diode is electrically connected to a gate of the NMOS transistor. The power module further includes a power module control terminal electrically connected to an anode of the first capacitor and an anode of the second diode.Type: ApplicationFiled: January 11, 2022Publication date: May 11, 2023Inventors: Ching-Yao LIU, Yueh-Tsung HSIEH, Kuo-Bin WANG, Chih-Chiang WU, Li-Chuan TANG, Wei-Hua CHIENG, Edward Yi CHANG, Stone CHENG
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Patent number: 11646732Abstract: A power module includes: a GaN transistor, an NMOS transistor, a first capacitor, a first diode and a second diode. The NMOS transistor is electrically connected to the GaN transistor. A negative electrode of the first capacitor is electrically connected to an anode of the first diode and a gate of the GaN transistor. A cathode of the second diode is electrically connected to a gate of the NMOS transistor. The power module further includes a power module control terminal electrically connected to an anode of the first capacitor and an anode of the second diode.Type: GrantFiled: January 11, 2022Date of Patent: May 9, 2023Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Ching-Yao Liu, Yueh-Tsung Hsieh, Kuo-Bin Wang, Chih-Chiang Wu, Li-Chuan Tang, Wei-Hua Chieng, Edward Yi Chang, Stone Cheng
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Publication number: 20230093515Abstract: A synchronous buck converter using a single gate drive control is provided and includes a drive circuit, a p-type gallium nitride (p-GaN) transistor switch module and an inductor. A gallium nitride power transistor is used as an upper side transistor switch, and a PMOS power transistor is used as a lower side transistor switch in the p-GaN transistor switch module. A gate of the upper side transistor switch and a gate of the lower side transistor switch are coupled to each other and receive a switch signal provided by the drive circuit at the same time. By controlling the on and off of the upper side transistor switch and the lower side transistor switch, the problem of simultaneous activation of the upper and lower side transistor switches can be avoided.Type: ApplicationFiled: December 1, 2021Publication date: March 23, 2023Inventors: Wei-Hua Chieng, Edward Yi Chang, Stone Cheng, Shyr-Long Jeng, Li-Chuan Tang, Chih-Chiang Wu, Ching-Yao Liu, Kuo-Bin Wang
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Patent number: 11569696Abstract: A control method of a minimum power input applicable to a wireless power transfer system including a power transmission unit and at least one power receiving unit is provided. The power transmission unit is electrically connected with a control voltage signal and an input voltage signal and accordingly generates the minimum power input. The power transmission unit transmits the minimum power input wirelessly through a wireless transmission to the at least one power receiving unit for receiving. By adjusting the input voltage signal, the duty ratio and resonant frequency of the control voltage signal, the present invention ensures an optimal power transmission efficiency of the wireless power transmission system. Moreover, parameters of a charge pump reservoir and gate driving circuit can be further designed in view of the trend feedback of its gate drive waveforms so as to optimize the effect of the proposed invention.Type: GrantFiled: May 28, 2021Date of Patent: January 31, 2023Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Wei-Hua Chieng, Edward Yi Chang, Stone Cheng, Shyr-Long Jeng, Newton Tang, Chih-Chiang Wu, Ching-Yao Liu, Kuo-Bin Wang
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Publication number: 20220385093Abstract: The present disclosure provides a fast charging driver. The fast charging driver is configured to charge a battery of an electronic device. The fast charging driver includes a fast charging circuit and a charging controller. The fast charging circuit includes a first depletion-type GaN transistor, a first enhancement-type field effect transistor, a second depletion-type GaN transistor and a second enhancement-type field effect transistor. The charging controller is configured to control the fast charging circuit to operate in a constant current mode or a constant voltage mode according to a battery level of the battery. By utilizing the first depletion-type GaN transistor and the second depletion-type GaN transistor with a characteristic of a relatively low switching loss, the power consumption during charging the battery by the fast charging driver is decreased to improve the charge speed.Type: ApplicationFiled: April 27, 2022Publication date: December 1, 2022Inventors: Edward Yi CHANG, Stone CHENG, Wei-Hua CHIENG, Shyr-Long JENG, Chih-Chiang WU
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Publication number: 20220344975Abstract: An inductive resonant wireless charging system includes a resonant wireless charging transmitting device, a wireless charging relay device and an inductive wireless charging receiving device. The resonant wireless charging transmitting device transmits a high-frequency radio frequency wave. The wireless charging relay device receives the high-frequency radio frequency wave using an electromagnetic resonance way, and converts the high-frequency radio frequency wave into a low-frequency radio frequency wave to transmit the low-frequency radio frequency wave. The inductive wireless charging receiving device receives the low-frequency radio frequency wave in a manner of electromagnetic induction.Type: ApplicationFiled: September 10, 2021Publication date: October 27, 2022Inventors: Edward Yi CHANG, Stone CHENG, Wei-Hua CHIENG, Shyr-Long JENG, Ching-Yao LIU, Li-Chuan TANG