Patents by Inventor Eiichi Makino

Eiichi Makino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6590953
    Abstract: The rotary member carrying the X-ray radiation unfit and the X-ray detection unit and rotated around a subject is used as the rotor. The rotor is provided with a rotor core and a plurality of conductors connected to the core. The stator has at least one set of stator core and stator winding, the at least one set of stator core and stator winding being adapted to clamp the rotor and arranged at opposing positions. A three-phase AC current is supplied to the stator winding to generate a rotating magnetic field to rotate the rotor and thereby rotate the rotary member at high speed. Because the scan time can be reduced, the X-ray CT scanner can scan such moving organs as heart.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: July 8, 2003
    Assignee: Hitachi Medical Corporation
    Inventors: Tsutomu Suzuki, Hiroshi Takano, Eiichi Makino, Takaaki Kobiki, Akira Kurome
  • Publication number: 20020031201
    Abstract: The rotary member carrying the X-ray radiation unfit and the X-ray detection unit and rotated around a subject is used as the rotor. The rotor is provided with a rotor core and a plurality of conductors connected to the core. The stator has at least one set of stator core and stator winding, the at least one set of stator core and stator winding being adapted to clamp the rotor and arranged at opposing positions. A three-phase AC current is supplied to the stator winding to generate a rotating magnetic field to rotate the rotor and thereby rotate the rotary member at high speed. Because the scan time can be reduced, the X-ray CT scanner can scan such moving organs as heart.
    Type: Application
    Filed: September 12, 2001
    Publication date: March 14, 2002
    Inventors: Tsutomu Suzuki, Hiroshi Takano, Eiichi Makino, Takaaki Kobiki, Akira Kurome
  • Patent number: 6343038
    Abstract: In a semiconductor memory device including a bit line precharge/equalizing circuit, the control system of the bit line precharge/equalizing circuit is changed in the normal operation mode and in the test mode. In the test mode, the bit line precharge/equalizing circuit is temporarily turned ON when an internal activation signal becomes non-active and then the bit line precharge/equalizing circuit is turned OFF after the potentials of paired bit lines are completely equalized.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: January 29, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Yohji Watanabe, Daisuke Kato
  • Patent number: 6045262
    Abstract: A control apparatus for controlling movement of a table supporting an object under inspection in a medical diagnosis system includes a driving power unit for moving the table, a position detector for outputting a signal indicating a position of the table, a positioning servo-control unit for controlling the driving power unit so that the detected position signal coincides with a given desired value, a manipulating force detector for outputting a force signal corresponding to a manipulating force applied by an operator, a force-to-position conversion unit for converting the force signal into a position change quantity for the table, a force control unit for controlling the driving power unit in accordance with the position change quantity so long as the manipulating force is being detected, and a change-over unit for selecting either the positioning servo-control unit or the force control unit in response to operation of the operator.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: April 4, 2000
    Assignee: Hitachi Medical Corporation
    Inventors: Yoshikazu Igeta, Eiichi Makino, Mikio Mochitate, Hiroshi Abe, Takeshi Yano
  • Patent number: 5955891
    Abstract: The control voltage .phi.1 outputted by the control voltage generating circuit 1 is at a low level in a range where an external supply voltage Vcc is lower than the threshold value of the transistor P1, but increases continuously in analog manner when the external supply voltage Vcc rises. After having matched the external supply voltage Vcc, the control voltage .phi.1 increases in the same way as the external supply voltage Vcc. By use of the control voltage provided with the characteristics as described above for an output circuit, controlled is the gate of a transistor P4 of a low-voltage operating output section 6 operative only at a voltage lower than a predetermined value. The transistor P2 of a full-voltage operating output section 5 of the output circuit is always operative on the basis of the control signal .phi.H of the data output control circuit 3.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: September 21, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Masaru Koyanagi
  • Patent number: 5570047
    Abstract: A semiconductor integrated circuit includes memory cell blocks having memory cells arranged in matrix, sense amplifiers, each located adjacent to the memory cells, and sense amplifier control circuits, each of the sense amplifier control circuit being located on outside of the memory cell block. The sense amplifier control circuit has a standard voltage generating circuit and a control circuit for receiving the standard voltage and for transferring a driver signal to the sense amplifier to control the charging ability of the sense amplifier. The source voltage has three voltage regions, first, intermediate, and second regions. In the first voltage region, the potential of the driver signal increases with the increase of the source voltage. In the intermediate voltage region (2.7 to 3 Volt), the potential of the driver signal is changed oppose to the change of the source voltage, and in the second voltage region, the potential of the driver signal decreases with the increase of the source voltage.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: October 29, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Masaru Koyanagi, Kazuyoshi Muraoka
  • Patent number: 5570038
    Abstract: The control voltage .phi.1 outputted by the control voltage generating circuit 1 is at a low level in a range where an external supply voltage Vcc is lower than the threshold value of the transistor P1, but increases continuously in analog manner when the external supply voltage Vcc rises. After having matched the external supply voltage Vcc, the control voltage .phi.1 increases in the same way as the external supply voltage Vcc. By use of the control voltage provided with the characteristics as described above for an output circuit, controlled is the gate of a transistor P4 of a low-voltage operating output section 6 operative only at a voltage lower than a predetermined value. The transistor P2 of a full-voltage operating output section 5 of the output circuit is always operative on the basis of the control signal .phi.H of the data output control circuit 3.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: October 29, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Masaru Koyanagi
  • Patent number: 5491430
    Abstract: The control voltage .phi.1 outputted by the control voltage generating circuit 1 is at a low level in a range where an external supply voltage Vcc is lower than the threshold value of the transistor P1, but increases continuously in analog manner when the external supply voltage Vcc rises. After having matched the external supply voltage Vcc, the control voltage .phi.1 increases in the same way as the external supply voltage Vcc. By use of the control voltage provided with the characteristics as described above for an output circuit, controlled is the gate of a transistor P4 of a low-voltage operating output section 6 operative only at a voltage lower than a predetermined value. The transistor P2 of a full-voltage operating output section 5 of the output circuit is always operative on the basis of the control signal .phi.H of the data output control circuit 3.
    Type: Grant
    Filed: May 13, 1994
    Date of Patent: February 13, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Masaru Koyanagi